Power Supply Requirements And Characteristics - Texas Instruments TPS65981EVM Manual

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7.5 Power Supply Requirements and Characteristics

Recommended operating conditions; T
PARAMETER
EXTERNAL
VIN_3V3
Input 3.3-V supply
Input voltage to power C_CC pins. This input is
PP_CABLE
also available to power core circuitry
Bidirection DC bus voltage. Output from the
VBUS
TPS65981 or input to the TPS65981
5-V supply input to power VBUS. This supply
PP_5V0
does not power the TPS65981
(1)
VDDIO
Optional supply for I/O cells
INTERNAL
DC 3.3 V generated internally by either a switch
VLDO_3V3
from VIN_3V3, an LDO from PP_CABLE, or an
LDO from VBUS
VDO_LDO3V3
Dropout voltage of LDO_3V3 from PP_CABLE
Dropout voltage of LDO_3V3 from VBUS
VLDO_1V8D
DC 1.8 V generated for internal digital circuitry
VLDO_1V8A
DC 1.8 V generated for internal analog circuitry
DC voltage generated on LDO_BMC. Setting for
VLDO_BMC
USB-PD
DC current supplied by the 3.3-V LDOs. This
ILDO_3V3
includes internal core power and external load on
LDO_3V3
ILDO_3V3EX
External DC current supplied by LDO_3V3
DC current supplied by LDO_1V8D. This is
ILDO_1V8D
intended for internal loads only but small external
loads may be added.
ILDO_1V8DEX
External DC current supplied by LDO_1V8D.
DC current supplied by LDO_1V8A. This is
ILDO_1V8A
intended for internal loads only but small external
loads may be added.
ILDO_1V8AEX
External DC current supplied by LDO_1V8A.
DC current supplied by LDO_BMC. This is
ILDO_BMC
intended for internal loads only
ILDO_BMCEX
External DC current supplied by LDO_BMC
Forward voltage drop across VIN_3V3 to
VFWD_DROP
LDO_3V3 switch
Input switch resistance from VIN_3V3 to
RIN_3V3
LDO_3V3
(1)
I/O buffers are not fail-safe to LDO_3V3. Therefore, VDDIO may power-up before LDO_3V3. When VDDIO powers up before
LDO_3V3, the I/Os shall not be driven high. When VDDIO is low and LDO_3V3 is high, the I/Os may be driven high.
Copyright © 2021 Texas Instruments Incorporated
= –40°C to +105°C unless otherwise noted
A
I
LOAD
I
LOAD
V
VIN_3V3
Product Folder Links:
SLVSDC2C – FEBRUARY 2016 – REVISED AUGUST 2021
TEST CONDITIONS
= 50 mA
= 50 mA
– V
> 50 mV
LDO_3V3
TPS65981
TPS65981
MIN
TYP
MAX
UNIT
2.85
3.3
3.45
V
2.95
5
5.5
V
4
5
22
V
4.75
5
5.5
V
1.7
3.45
V
2.7
3.3
3.45
V
250
mV
250
500
750
mV
1.7
1.8
1.9
V
1.7
1.8
1.9
V
1.05
1.125
1.2
V
70
mA
30
mA
50
mA
5
mA
20
mA
5
mA
5
mA
0
mA
25
60
90
mV
0.5
1.1
1.75
Ω
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