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AM1808
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
6.23.2 Management Data Input/Output (MDIO) Electrical Data/Timing
Table 6-105. Timing Requirements for MDIO Input (see
NO.
1
t
c(MDCLK)
2
t
w(MDCLK)
3
t
t(MDCLK)
4
t
su(MDIO-MDCLKH)
5
t
h(MDCLKH-MDIO)
MDCLK
MDIO
(input)
Table 6-106. Switching Characteristics Over Recommended Operating Conditions for MDIO Output
NO.
7
t
d(MDCLKL-MDIO)
MDCLK
MDIO
(output)
194
Peripheral Information and Electrical Specifications
Cycle time, MDCLK
Pulse duration, MDCLK high/low
Transition time, MDCLK
Setup time, MDIO data input valid before MDCLK high
Hold time, MDIO data input valid after MDCLK high
1
3
Figure 6-50. MDIO Input Timing
(see
Figure
Delay time, MDCLK low to MDIO data output valid
1
7
Figure 6-51. MDIO Output Timing
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Figure 6-50
and
1.3V, 1.2V, 1.1V
MIN
400
180
16
0
3
4
5
6-51)
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AM1808
www.ti.com
Figure
6-51)
1.0V
UNIT
MAX
MIN
MAX
400
ns
180
ns
5
5
ns
21
ns
0
ns
1.3V, 1.2V, 1.1V,
1.0V
UNIT
MIN
MAX
0
100
ns
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