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Start Address
End Address
0xB000 0000
0xB000 7FFF
0xB000 8000
0xBFFF FFFF
0xC000 0000
0xCFFF FFFF
0xD000 0000
0xE000 0000
0xFFFD 0000
0xFFFD FFFF
0xFFFE 0000
0xFFFE DFFF
0xFFFE E000
0xFFFE FFFF
0xFFFF 0000
0xFFFF 1FFF
0xFFFF 2000
0xFFFF FFFF
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Table 3-2. Device Top Level Memory Map (continued)
Size
ARM Mem Map
32K
256M
64K
ARM local ROM
8K
ARM Interrupt
Controller
8K
ARM local RAM
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SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
EDMA Mem Map
PRUSS Mem
Map
DDR2/mDDR Control Regs
DDR2/mDDR Data
ARM Local RAM
(PRU0 only)
AM1808
AM1808
Master
LCDC Mem
Peripheral Mem
Map
Map
Device Overview
13
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