Texas Instruments AM1808 User Manual page 135

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Table 6-49. McASP Registers Accessed Through Peripheral Configuration Port (continued)
BYTE ADDRESS ACRONYM
0x01D0 010C DITCSRA3
0x01D0 0110 DITCSRA4
0x01D0 0114 DITCSRA5
0x01D0 0118 DITCSRB0
0x01D0 011C DITCSRB1
0x01D0 0120 DITCSRB2
0x01D0 0124 DITCSRB3
0x01D0 0128 DITCSRB4
0x01D0 012C DITCSRB5
0x01D0 0130 DITUDRA0
0x01D0 0134 DITUDRA1
0x01D0 0138 DITUDRA2
0x01D0 013C DITUDRA3
0x01D0 0140 DITUDRA4
0x01D0 0144 DITUDRA5
0x01D0 0148 DITUDRB0
0x01D0 014C DITUDRB1
0x01D0 0150 DITUDRB2
0x01D0 0154 DITUDRB3
0x01D0 0158 DITUDRB4
0x01D0 015C DITUDRB5
0x01D0 0180
0x01D0 0184
0x01D0 0188
0x01D0 018C
0x01D0 0190
0x01D0 0194
0x01D0 0198
0x01D0 019C
0x01D0 01A0
0x01D0 01A4
0x01D0 01A8 SRCTL10
0x01D0 01AC SRCTL11
0x01D0 01B0 SRCTL12
0x01D0 01B4 SRCTL13
0x01D0 01B8 SRCTL14
0x01D0 01BC SRCTL15
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Left (even TDM time slot) channel status register (DIT mode) 3
Left (even TDM time slot) channel status register (DIT mode) 4
Left (even TDM time slot) channel status register (DIT mode) 5
Right (odd TDM time slot) channel status register (DIT mode) 0
Right (odd TDM time slot) channel status register (DIT mode) 1
Right (odd TDM time slot) channel status register (DIT mode) 2
Right (odd TDM time slot) channel status register (DIT mode) 3
Right (odd TDM time slot) channel status register (DIT mode) 4
Right (odd TDM time slot) channel status register (DIT mode) 5
Left (even TDM time slot) channel user data register (DIT mode) 0
Left (even TDM time slot) channel user data register (DIT mode) 1
Left (even TDM time slot) channel user data register (DIT mode) 2
Left (even TDM time slot) channel user data register (DIT mode) 3
Left (even TDM time slot) channel user data register (DIT mode) 4
Left (even TDM time slot) channel user data register (DIT mode) 5
Right (odd TDM time slot) channel user data register (DIT mode) 0
Right (odd TDM time slot) channel user data register (DIT mode) 1
Right (odd TDM time slot) channel user data register (DIT mode) 2
Right (odd TDM time slot) channel user data register (DIT mode) 3
Right (odd TDM time slot) channel user data register (DIT mode) 4
Right (odd TDM time slot) channel user data register (DIT mode) 5
SRCTL0 Serializer control register 0
SRCTL1 Serializer control register 1
SRCTL2 Serializer control register 2
SRCTL3 Serializer control register 3
SRCTL4 Serializer control register 4
SRCTL5 Serializer control register 5
SRCTL6 Serializer control register 6
SRCTL7 Serializer control register 7
SRCTL8 Serializer control register 8
SRCTL9 Serializer control register 9
Serializer control register 10
Serializer control register 11
Serializer control register 12
Serializer control register 13
Serializer control register 14
Serializer control register 15
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SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
REGISTER DESCRIPTION
Peripheral Information and Electrical Specifications
AM1808
AM1808
135