Table of Contents
Advertisement
www.ti.com
11
W
DDR_D[7]
DDR_DQS[1]
V
DDR_D[14]
U
DDR_D[9]
T
DDR_DQGATE0
R
P
V
SS
V
N
SS
V
M
SS
V
L
SS
V
K
SS
A A
B
11
D
C
Copyright © 2010–2014, Texas Instruments Incorporated
12
13
14
VP_CLKIN0/
UHPI_HCS
DDR_DQM[0]
DDR_D[6]
PRU1_R30[10]/
GP6[7]/
UPP_2xTXCLK
DDR_D[5]
DDR_D[2]
DDR_D[4]
DDR_ZP
DDR_D[3]
DDR_D[1]
DDR_D[11]
DDR_D[8]
DDR_DQS[0]
VP_DIN[5]/
UHPI_HD[13]/
DDR_DQGATE1
DVDD18
UPP_D[13]/
RMII_TXEN/
PRU0_R31[27]
DVDD3318_C
USB1_VDDA18
DVDD18
V
DVDD3318_C
USB0_VDDA18
SS
USB_CVDD
DVDD3318_C
NC_M14
RTC_CVDD
CV
DVDD3318_C
DD
CV
DVDD3318_C
DD
RESET
12
13
14
Figure 3-2. Pin Map (Quad B)
Submit Documentation Feedback
Product Folder Links:
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
15
16
VP_DIN[4]/
PRU0_R30[28]/
/
UHPI_HD[12]/
UHPI_HD[10]/
UHPI_HCNTL1/
UPP_D[12]/
UPP_D[10]/
UPP_CHA_START/
RMII_RXD[1]/
RMII_RXER /
GP6[10]
PRU0_R31[26]
PRU0_R31[24]
VP_CLKIN1/
VP_DIN[6]/
UHPI_HDS1
/
UHPI_HD[14]/
UHPI_HD[11]/
PRU1_R30[9]/
UPP_D[14]/
GP6[6]/
RMII_TXD[0]/
RMII_RXD[0]/
PRU1_R31[16]
PRU0_R31[28]
PRU0_R31[25]
PRU0_R30[27]/
PRU0_R30[29]/
DDR_D[0]
UHPI_HHWIL/
UHPI_HCNTL0/
UPP_CHA_ENABLE/
UPP_CHA_CLOCK/
GP6[9]
PRU0_R30[26]/
UHPI_HR /
W
VP_DIN[12]/
RESETOUT
UPP_CHA_WAIT/
UHPI_HD[4]/
UHPI_HAS
GP6[8]/
UPP_D[4]/
PRU1_R30[14]/
PRU1_R31[17]
PRU0_R30[12]/
PRU0_R31[12]
VP_DIN[9]/
PRU0_R30[30] /
PRU0_R30[31]/
UHPI_HD[1]/
UHPI_HINT
/
UHPI_HRDY
UPP_D[1]/
PRU1_R30[11]/
PRU1_R30[12]
PRU0_R30[9]/
GP6[12]
PRU0_R31[9]
UHPI_HD[0]/
USB1_VDDA33
USB0_ID
PRU1_R31[0]
PLL1_VDDA
USB0_VDDA12
NC_N16
PLL1_VSSA
PLL0_VSSA
TDI
PLL0_VDDA
TMS
DVDD3318_B
EMU1
15
16
AM1808
17
18
19
VP_DIN[1]/
VP_DIN[0]/
VP_DIN[2]/
UHPI_HD[9]/
UHPI_HD[8]/
UPP_D[9]/
UPP_D[8]/
RMII_MHZ_50_CLK /
RMII_CRS_DV/
PRU0_R31[23]
PRU1_R31[29]
VP_DIN[14]_
VP_DIN[3]/
VP_DIN[15]_
HSYNC/
VSYNC/
UHPI_HD[6]/
UPP_D[11]/
UHPI_HD[7]/
UPP_D[6]/
UPP_D[7]/
PRU0_R30[14]/
PRU0_R30[15]/
PRU0_R31[14]
PRU0_R31[15]
VP_DIN[13]_
VP_DIN[7]/
FIELD/
UHPI_HD[15]/
UHPI_HD[5]/
UPP_D[15]/
UPP_D[5]/
RMII_TXD[1]/
PRU0_R30[13]/
GP6[11]
PRU0_R31[29]
PRU0_R31[13]
CLKOUT/
/
/
UHPI_HDS2
/
RSV2
PRU1_R30[13]/
GP6[15]
GP6[14]
VP_DIN[11]/
VP_DIN[10]/
UHPI_HD[3]/
UHPI_HD[2]/
/
UPP_D[3]/
UPP_D[2]/
PRU0_R30[11]/
PRU0_R30[10]/
GP6[13]
PRU0_R31[11]
PRU0_R31[10]
VP_DIN[8]/
UPP_D[0]/
USB1_DM
USB1_DP
GP6[5]/
USB0_VDDA33
USB0_VBUS
USB0_DM
USB0_DP
TRST
OSCVSS
OSCIN
RTCK/
USB0_DRVVBUS
OSCOUT
GP8[0]
17
18
19
Device Overview
AM1808
W
V
U
T
R
P
N
M
L
K
15
Advertisement
Table of Contents
