Texas Instruments AM1808 User Manual page 226

AM1808
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
6.27.2 VPIF Electrical Data/Timing
Table 6-119. Timing Requirements for VPIF VP_CLKINx Inputs
NO.
Cycle time, VP_CLKIN0
1 t
c(VKI)
Cycle time, VP_CLKIN1/2/3
2 t Pulse duration, VP_CLKINx high
w(VKIH)
3 t Pulse duration, VP_CLKINx low
w(VKIL)
4 t Transition time, VP_CLKINx
t(VKI)
(1) C = VP_CLKINx period in ns.
VP_CLKINx
Table 6-120. Timing Requirements for VPIF Channels 0/1 Video Capture Data and Control Inputs
NO.
Setup time, VP_DINx valid before
1 t
su(VDINV-VKIH)
VP_CLKIN0/1 high
Hold time, VP_DINx valid after
2 t
h(VKIH-VDINV)
VP_CLKIN0/1 high
VP_CLKIN0/1
VP_DINx/FIELD/
HSYNC/VSYNC
Figure 6-74. VPIF Channels 0/1 Video Capture Data and Control Input Timing
226 Peripheral Information and Electrical Specifications
1
2
Figure 6-73. Video Port Capture VP_CLKINx Timing
(see Figure
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(see
1.3V, 1.2V
MIN MAX
13.3
13.3
0.4C
0.4C
5
6-74)
1.3V 1.2V
MIN MAX MIN MAX
4 4
0.5 0
1
2
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Figure 6-73)
1.1V 1.0V
MIN MAX MIN MAX
20 37
20 37
0.4C 0.4C
0.4C 0.4C
5 5
4
3
4
1.1V 1.0V
MIN MAX MIN MAX
6 7
0 0
UNIT
ns
ns
ns
ns
ns
UNIT
ns
ns