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AM1808
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
Table 3-27. General Purpose Input Output Terminal Functions (continued)
SIGNAL
EMA_A[15] / MMCSD0_DAT[6] / PRU1_R30[23] / GP5[15] /
PRU1_R31[23]
EMA_A[14] / MMCSD0_DAT[7] /PRU1_R30[22] / GP5[14] /
PRU1_R31[22]
EMA_A[13] / PRU0_R30[21] / PRU1_R30[21] / GP5[13] /
PRU1_R31[21]
EMA_A[12] / PRU1_R30[20] / GP5[12] / PRU1_R31[20]
EMA_A[11] / PRU1_R30[19] / GP5[11] / PRU1_R31[19]
EMA_A[10] / PRU1_R30[18] / GP5[10] / PRU1_R31[18]
EMA_A[9] / PRU1_R30[17] / GP5[9]
EMA_A[8] / PRU1_R30[16] / GP5[8]
EMA_A[7] / PRU1_R30[15] / GP5[7]
EMA_A[6] / GP5[6]
EMA_A[5] / GP5[5]
EMA_A[4] / GP5[4]
EMA_A[3] / GP5[3]
EMA_A[2] / GP5[2]
EMA_A[1] / GP5[1]
EMA_A[0] / GP5[0]
RESETOUT / UHPI_HAS / PRU1_R30[14] / GP6[15]
CLKOUT / UHPI_HDS2 / PRU1_R30[13] / GP6[14]
PRU0_R30[31] / UHPI_HRDY / PRU1_R30[12] / GP6[13]
PRU0_R30[30] / UHPI_HINT / PRU1_R30[11] / GP6[12]
PRU0_R30[29] / UHPI_HCNTL0 / UPP_CHA_CLOCK / GP6[11]
PRU0_R30[28] / UHPI_HCNTL1 / UPP_CHA_START / GP6[10]
PRU0_R30[27] / UHPI_HHWIL / UPP_CHA_ENABLE / GP6[9]
PRU0_R30[26] / UHPI_HRW / UPP_CHA_WAIT / GP6[8] /
PRU1_R31[17]
VP_CLKIN0 / UHPI_HCS / PRU1_R30[10] / GP6[7] /
UPP_2xTXCLK
VP_CLKIN1 / UHPI_HDS1 / PRU1_R30[9] / GP6[6] /
PRU1_R31[16]
VP_DIN[8] / UHPI_HD[0] / UPP_D[0] / GP6[5] / PRU1_R31[0]
VP_CLKIN2 / MMCSD1_DAT[3] / PRU1_R30[3] / GP6[4] /
PRU1_R31[4]
VP_CLKOUT2 / MMCSD1_DAT[2] / PRU1_R30[2] / GP6[3] /
PRU1_R31[3]
VP_CLKIN3 / MMCSD1_DAT[1] / PRU1_R30[1] / GP6[2] /
PRU1_R31[2]
VP_CLKOUT3 / PRU1_R30[0] / GP6[1] / PRU1_R31[1]
LCD_AC_ENB_CS / GP6[0] / PRU1_R31[28]
54
Device Overview
NAME
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Product Folder Links:
(1)
(2)
TYPE
PULL
NO.
GP5
C11
I/O
CP[19]
A12
I/O
CP[19]
D11
I/O
CP[19]
D13
I/O
CP[19]
B12
I/O
CP[19]
C12
I/O
CP[19]
D12
I/O
CP[19]
A13
I/O
CP[19]
B13
I/O
CP[20]
E13
I/O
CP[20]
C13
I/O
CP[20]
A14
I/O
CP[20]
D14
I/O
CP[20]
B14
I/O
CP[20]
D15
I/O
CP[20]
C14
I/O
CP[20]
GP6
T17
I/O
CP[21]
T18
I/O
CP[22]
R17
I/O
CP[23]
R16
I/O
CP[23]
U17
I/O
CP[24]
W15
I/O
CP[24]
U16
I/O
CP[24]
T15
I/O
CP[24]
W14
I/O
CP[25]
V15
I/O
CP[25]
P17
I/O
CP[27]
H3
I/O
CP[30]
K3
I/O
CP[30]
J3
I/O
CP[30]
K4
I/O
CP[30]
R5
I/O
CP[31]
Copyright © 2010–2014, Texas Instruments Incorporated
AM1808
www.ti.com
POWER
DESCRIPTION
(3)
GROUP
B
B
B
B
B
B
B
GPIO Bank 5
B
B
B
B
B
B
B
B
B
C
C
C
C
C
C
C
C
C
GPIO Bank 6
C
C
C
C
C
C
C
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