Texas Instruments AM1808 User Manual page 153

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6.17.1 SPI Peripheral Registers Description(s)
Table 6-67 is a list of the SPI registers.
SPI0
BYTE ADDRESS BYTE ADDRESS
0x01C4 1000
0x01C4 1004
0x01C4 1008
0x01C4 100C
0x01C4 1010
0x01C4 1014
0x01C4 1018
0x01C4 101C
0x01C4 1020
0x01C4 1024
0x01C4 1028
0x01C4 102C
0x01C4 1030
0x01C4 1034
0x01C4 1038
0x01C4 103C
0x01C4 1040
0x01C4 1044
0x01C4 1048
0x01C4 104C
0x01C4 1050
0x01C4 1054
0x01C4 1058
0x01C4 105C
0x01C4 1060
0x01C4 1064
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Table 6-67. SPIx Configuration Registers
SPI1
ACRONYM
0x01F0 E000 SPIGCR0
0x01F0 E004 SPIGCR1
0x01F0 E008 SPIINT0
0x01F0 E00C SPILVL
0x01F0 E010 SPIFLG
0x01F0 E014 SPIPC0
0x01F0 E018 SPIPC1
0x01F0 E01C SPIPC2
0x01F0 E020 SPIPC3
0x01F0 E024 SPIPC4
0x01F0 E028 SPIPC5
0x01F0 E02C Reserved
0x01F0 E030 Reserved
0x01F0 E034 Reserved
0x01F0 E038 SPIDAT0
0x01F0 E03C SPIDAT1
0x01F0 E040 SPIBUF
0x01F0 E044 SPIEMU
0x01F0 E048 SPIDELAY
0x01F0 E04C SPIDEF
0x01F0 E050 SPIFMT0
0x01F0 E054 SPIFMT1
0x01F0 E058 SPIFMT2
0x01F0 E05C SPIFMT3
0x01F0 E060 INTVEC0
0x01F0 E064 INTVEC1
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SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
DESCRIPTION
Global Control Register 0
Global Control Register 1
Interrupt Register
Interrupt Level Register
Flag Register
Pin Control Register 0 (Pin Function)
Pin Control Register 1 (Pin Direction)
Pin Control Register 2 (Pin Data In)
Pin Control Register 3 (Pin Data Out)
Pin Control Register 4 (Pin Data Set)
Pin Control Register 5 (Pin Data Clear)
Reserved - Do not write to this register
Reserved - Do not write to this register
Reserved - Do not write to this register
Shift Register 0 (without format select)
Shift Register 1 (with format select)
Buffer Register
Emulation Register
Delay Register
Default Chip Select Register
Format Register 0
Format Register 1
Format Register 2
Format Register 3
Interrupt Vector for SPI INT0
Interrupt Vector for SPI INT1
Peripheral Information and Electrical Specifications
AM1808
AM1808
153