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Table 6-22. Switching Characteristics for EMIFA Asynchronous Memory Interface
NO.
22
t
Output setup time, EMA_A[13:0] valid to EMA_WE low
su(EMAV-EMWEL)
23
t
Output hold time, EMA_WE high to EMA_A[13:0] invalid
h(EMWEH-EMAIV)
EMA_WE active low width (EW = 0)
24
t
w(EMWEL)
EMA_WE active low width (EW = 1)
25
t
Delay time from EMA_WAIT deasserted to EMA_WE high
d(EMWAITH-EMWEH)
26
t
Output setup time, EMA_D[15:0] valid to EMA_WE low
su(EMDV-EMWEL)
27
t
Output hold time, EMA_WE high to EMA_D[15:0] invalid
h(EMWEH-EMDIV)
30
t
Output setup time, EMA_A_RW valid to EMA_WE low
su(EMARW-EMWEL)
31
t
Output hold time, EMA_WE high to EMA_A_RW invalid
h(EMWEH-EMARW)
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SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
(1) (2) (3)
1.3V, 1.2V, 1.1V, 1.0V
MIN
Nom
(WS)*E-3
(WH)*E-3
(WST)*E-3
(WST+EWC)*E-3
(WST+EWC)*E
3E-3
(WS)*E-3
(WH)*E-3
(WS)*E-3
(WH)*E-3
Peripheral Information and Electrical Specifications
AM1808
AM1808
(continued)
UNIT
MAX
(WS)*E
(WS)*E+3
ns
(WH)*E
(WH)*E+3
ns
(WST)*E
(WST)*E+3
ns
(WST+EWC)*E+3
ns
4E
4E+3
ns
(WS)*E
(WS)*E+3
ns
(WH)*E
(WH)*E+3
ns
(WS)*E
(WS)*E+3
ns
(WH)*E
(WH)*E+3
ns
105
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