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Table 6-51. McASP AFIFO Registers Accessed Through Peripheral Configuration Port
BYTE ADDRESS
0x01D0 1000
0x01D0 1010
0x01D0 1014
0x01D0 1018
0x01D0 101C
6.15.2 McASP Electrical Data/Timing
6.15.2.1 Multichannel Audio Serial Port 0 (McASP0) Timing
Table 6-52
and
Table 6-54
Figure
6-31).
Table 6-52. Timing Requirements for McASP0 (1.3V, 1.2V, 1.1V)
NO.
1
t
Cycle time, AHCLKR/X
c(AHCLKRX)
2
t
Pulse duration, AHCLKR/X high or low
w(AHCLKRX)
3
t
Cycle time, ACLKR/X
c(ACLKRX)
4
t
Pulse duration, ACLKR/W high or low AHCLKR/X ext
w(ACLKRX)
Setup time,
5
t
su(AFSRX-ACLKRX)
AFSR/X input to ACLKR/X
Hold time,
6
t
h(ACLKRX-AFSRX)
AFSR/X input after ACLKR/X
Setup time,
7
t
su(AXR-ACLKRX)
AXR0[n] input to ACLKR/X
Hold time,
8
t
h(ACLKRX-AXR)
AXR0[n] input after ACLKR/X
(1) ACLKX0 internal – McASP0 ACLKXCTL.CLKXM = 1, PDIR.ACLKX = 1
ACLKX0 external input – McASP0 ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 0
ACLKX0 external output – McASP0 ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 1
ACLKR0 internal – McASP0 ACLKRCTL.CLKRM = 1, PDIR.ACLKR =1
ACLKR0 external input – McASP0 ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 0
ACLKR0 external output – McASP0 ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 1
(2) P = SYSCLK2 period
(3) This timing is limited by the timing shown or 2P, whichever is greater.
(4) McASP0 ACLKXCTL.ASYNC=1: Receiver is clocked by its own ACLKR0
(5) McASP0 ACLKXCTL.ASYNC=0: Receiver is clocked by transmitter's ACLKX0
Copyright © 2010–2014, Texas Instruments Incorporated
ACRONYM
REGISTER DESCRIPTION
AFIFOREV
AFIFO revision identification register
WFIFOCTL
Write FIFO control register
WFIFOSTS
Write FIFO status register
RFIFOCTL
Read FIFO control register
RFIFOSTS
Read FIFO status register
assume testing over recommended operating conditions (see
AHCLKR/X ext
AHCLKR/X int
AHCLKR/X ext input
(4)
AHCLKR/X ext output
AHCLKR/X int
AHCLKR/X ext input
(4)
AHCLKR/X ext output
AHCLKR/X int
(4) (5)
AHCLKR/X ext
AHCLKR/X int
AHCLKR/X ext input
(4) (5)
AHCLKR/X ext output
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SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
1.3V, 1.2V
MIN
MAX
25
12.5
(3)
25
12.5
11.5
4
4
-1
1
1
11.5
4
-1
3
3
Peripheral Information and Electrical Specifications
AM1808
AM1808
Figure 6-30
and
(1) (2)
1.1V
UNIT
MIN
MAX
28
ns
14
ns
(3)
28
ns
14
ns
12
ns
5
ns
5
ns
-2
ns
1
ns
1
ns
12
ns
5
ns
-2
ns
4
ns
4
ns
137
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