Texas Instruments AM1808 User Manual page 177

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6.19.2 UART Electrical Data/Timing
Table 6-88. Timing Requirements for UART Receive
NO.
4 t Pulse duration, receive data bit (RXDn)
w(URXDB)
5 t Pulse duration, receive start bit
w(URXSB)
(1) U = UART baud time = 1/programmed baud rate.
Table 6-89. Switching Characteristics Over Recommended Operating Conditions for UARTx Transmit
NO.
1 f Maximum programmable baud rate
(baud)
2 t Pulse duration, transmit data bit (TXDn)
w(UTXDB)
3 t Pulse duration, transmit start bit
w(UTXSB)
(1) U = UART baud time = 1/programmed baud rate.
(2) D = UART input clock in MHz.
For UART0, the UART input clock is SYSCLK2.
For UART1 or UART2, the UART input clock is ASYNC3 (either PLL0_SYCLK2 or PLL1_SYSCLK2).
(3) E = UART divisor x UART sampling rate. The UART divisor is set through the UART divisor latch registers (DLL and DLH). The UART
sampling rate is set through the over-sampling mode select bit (OSM_SEL) of the UART mode definition register (MDR).
(4) Baud rate is not indicative of data rate. Actual data rate will be limited by system factors such as EDMA loading, EMIF/DDR loading,
system frequency, etc.
Copyright © 2010–2014, Texas Instruments Incorporated
(see
PARAMETER
Start
UART_TXDn Bit
Start
UART_RXDn Bit
Figure 6-43. UART Transmit/Receive Timing
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(1)
(see
Figure 6-43)
3
2
Data Bits
5
4
Data Bits
Peripheral Information and Electrical Specifications
AM1808
AM1808
Figure 6-43)
1.3V, 1.2V, 1.1V, 1.0V
UNIT
MIN MAX
0.96U 1.05U
0.96U 1.05U
1.3V, 1.2V, 1.1V, 1.0V
UNIT
MIN MAX
(2) (3)
D/E MBaud
U - 2 U + 2
U - 2 U + 2
ns
ns
(1)
(4)
ns
ns
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