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AM1808
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
3.7.18 Ethernet Media Access Controller (EMAC)
Table 3-20. Ethernet Media Access Controller (EMAC) Terminal Functions
SIGNAL
NAME
AXR6 / CLKR0 / GP1[14] / MII_TXEN / PRU0_R31[6]
AXR5 / CLKX0 / GP1[13] / MII_TXCLK
AXR4 / FSR0 / GP1[12] / MII_COL
AXR3 / FSX0 / GP1[11] / MII_TXD[3]
AXR2 / DR0 / GP1[10] / MII_TXD[2]
AXR1 / DX0 / GP1[9] / MII_TXD[1]
AXR0 / ECAP0_APWM0 / GP8[7] / MII_TXD[0] /
CLKS0
SPI0_SOMI / EPWMSYNCI / GP8[6] / MII_RXER
SPI0_SIMO / EPWMSYNCO / GP8[5] / MII_CRS
SPI0_CLK / EPWM0A / GP1[8] / MII_RXCLK
SPI0_ENA / EPWM0B / PRU0_R30[6] / MII_RXDV
SPI0_SCS[5] / UART0_RXD / GP8[4] / MII_RXD[3]
SPI0_SCS[4] /UART0_TXD / GP8[3] / MII_RXD[2]
SPI0_SCS[3] / UART0_CTS / GP8[2] / MII_RXD[1] /
SATA_MP_SWITCH
SPI0_SCS[2] / UART0_RTS / GP8[1] / MII_RXD[0] /
SATA_CP_DET
VP_DIN[1] / UHPI_HD[9] / UPP_D[9] /
RMII_MHZ_50_CLK / PRU0_R31[23]
VP_DIN[2] / UHPI_HD[10] / UPP_D[10] / RMII_RXER /
PRU0_R31[24]
VP_DIN[3] / UHPI_HD[11] / UPP_D[11] / RMII_RXD[0]
/ PRU0_R31[25]
VP_DIN[4] / UHPI_HD[12] / UPP_D[12] / RMII_RXD[1]
/ PRU0_R31[26]
VP_DIN[0] / UHPI_HD[8] / UPP_D[8] / RMII_CRS_DV/
PRU1_R31[29]
VP_DIN[5] / UHPI_HD[13] / UPP_D[13] / RMII_TXEN /
PRU0_R31[27]
VP_DIN[6] / UHPI_HD[14] / UPP_D[14] / RMII_TXD[0]
/ PRU0_R31[28]
VP_DIN[7] / UHPI_HD[15] / UPP_D[15] / RMII_TXD[1]
/ PRU0_R31[29]
(1) I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.
Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the signal name
highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured
function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different
types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.
(2) IPD = Internal Pulldown resistor; IPU = Internal Pullup resistor; CP[n] = configurable pull-up/pull-down (where n is the pin group) using
the PUPDENA and PUPDSEL registers in the System Module. The pull-up and pull-down control of these pins is not active until the
device is out of reset. During reset, all of the pins associated with these registers are pulled down. If the application requires a pull-up,
an external pull-up can be used. For more detailed information on pullup/pulldown resistors and situations where external
pullup/pulldown resistors are required, see the
circuits, see the
Device Operating Conditions
(3) This signal is part of a dual-voltage IO group (A, B or C). These groups can be operated at 3.3V or 1.8V nominal. The three groups can
be operated at independent voltages but all pins withina group will operate at the same voltage. Group A operates at the voltage of
power supply DVDD3318_A. Group B operates at the voltage of power supply DVDD3318_B. Group C operates at the voltage of power
supply DVDD3318_C.
40
Device Overview
(1)
TYPE
PULL
NO.
MII
C1
O
CP[5]
D3
I
CP[5]
D1
I
CP[5]
E3
O
CP[5]
E2
O
CP[5]
E1
O
CP[5]
F3
O
CP[6]
C16
I
CP[7]
C18
I
CP[7]
D19
I
CP[7]
C17
I
CP[7]
C19
I
CP[8]
D18
I
CP[8]
E17
I
CP[9]
D16
I
CP[9]
RMII
W18
I/O
CP[26]
W17
I
CP[26]
V17
I
CP[26]
W16
I
CP[26]
W19
I
CP[26]
R14
O
CP[26]
V16
O
CP[26]
U18
O
CP[26]
Device Configuration
section. For electrical specifications on pullup and internal pulldown
section.
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Product Folder Links:
AM1808
POWER
(2)
DESCRIPTION
(3)
GROUP
A
EMAC MII Transmit enable output
A
EMAC MII Transmit clock input
A
EMAC MII Collision detect input
A
A
EMAC MII transmit data
A
A
A
EMAC MII receive error input
A
EMAC MII carrier sense input
A
EMAC MII receive clock input
A
EMAC MII receive data valid input
A
A
EMAC MII receive data
A
A
C
EMAC 50-MHz clock input or output
C
EMAC RMII receiver error
C
EMAC RMII receive data
C
C
EMAC RMII carrier sense data valid
C
EMAC RMII transmit enable
C
EMAC RMII transmit data
C
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