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AM1808
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
A
B
D
C
11
V
J
SS
CV
H
DD
G
DV
DD18
DV
F
DD3318_B
EMA_A[18]/
MMCSD0_DAT[3]/
E
PRU1_R30[26]/
GP4[2]
EMA_A[13]/
PRU0_R30[21]/
PRU1_R30[21]
D
GP5[13]/
PRU1_R31[21]
EMA_A[15]/
MMCSD0_DAT[6]/
PRU1_R30[23]/
C
GP5[15]/
PRU1_R31[23]
EMA_A[17]/
MMCSD0_DAT[4]/
B
PRU1_R30[25]
GP4[1]
EMA_A[20]/
MMCSD0_DAT[1]/
A
PRU1_R30[28]/
GP4[4]
11
16
Device Overview
12
13
14
DV
CV
DV
DD3318_B
DD
DD18
CV
CV
RV
DD
DD
DD
DV
DV
CV
DD3318_A
DD18
DD
DV
DV
DV
DD3318_B
DD3318_B
DD18
EMA_A[16]/
MMCSD0_DAT[5]/
EMA_A[6]/
DV
DD3318_B
PRU1_R30[24]/
GP5[6]
GP4[0]
EMA_A[12]/
EMA_A[9]/
PRU1_R30[20]/
EMA_A[3]/
PRU1_R30[17]/
GP5[12]/
GP5[3]
GP5[9]
PRU1_R31[20]
EMA_A[10]/
PRU1_R30[18]/
EMA_A[5]/
EMA_A[0]/
GP5[10]/
GP5[5]
GP5[0]
PRU1_R31[18]
EMA_A[11]/
EMA_A[7]/
PRU1_R30[19]/
EMA_A[2]/
PRU1_R30[15]/
GP5[11]/
GP5[2]
GP5[7]
PRU1_R31[19]
EMA_A[14]/
MMCSD0_DAT[7]/
EMA_A[8]/
EMA_A[4]/
PRU1_R30[22]/
PRU1_R30[16]/
GP5[4]
GP5[14]/
GP5[8]
PRU1_R31[22]
12
13
14
Figure 3-3. Pin Map (Quad C)
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15
16
17
TCK
EMU0
RSVDN
SPI1_SOMI/
SPI1_ENA/
V
SS
GP2[12]
GP2[11]
SPI1_SCS[7]/
SPI1_SIMO/
I2C0_SCL/
DV
DD3318_A
GP2[10]
TM64P2_OUT12/
GP1[5]
SPI1_SCS[4]/
SPI1_SCS[5]/
UART2_TXD/
UART2_RXD/
DV
DD3318_A
I2C1_SDA/
I2C1_SCL/
GP1[2]
GP1[3]
SPI0_SCS[1]/
SPI0_SCS[3]
TM64P0_OUT12/
UART0_CTS
CV
GP1[7]/
GP8[2]/
DD
MDCLK/
MII_RXD[1]/
TM64P0_IN12
SATA_MP_SWITCH
SPI0_SCS[2]
/
SPI0_SCS[0]/
UART0_RTS
/
TM64P1_OUT12/
EMA_A[1]/
GP8[1]/
GP1[6]/
GP5[1]
MII_RXD[0]/
MDIO/
SATA_CP_DET
TM64P1_IN12
SPI0_SOMI/
SPI0_ENA/
EMA_BA[0]/
EPWMSYNCI/
EPWM0B/
GP2[8]
GP8[6]/
PRU0_R30[6]/
MII_RXER
MII_RXDV
EMA_OE/
EMA_CS[5]/
EMA_CS[2]/
GP3[10]
GP3[12]
GP3[15]
EMA_RAS/
EMA_CS[3]/
EMA_BA[1]/
PRU0_R30[3]/
GP2[9]
GP2[5]/
GP3[14]
PRU0_R31[3]
15
16
17
Copyright © 2010–2014, Texas Instruments Incorporated
AM1808
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18
19
TDO
RTC_XI
J
RTC_VSS
RTC_XO
H
SPI1_SCS[6]/
SPI1_CLK/
I2C0_SDA/
G
GP2[13]
TM64P3_OUT12/
GP1[4]
SPI1_SCS[1]/
SPI1_SCS[2]/
EPWM1A/
UART1_TXD/
PRU0_R30[8]/
F
SATA_CP_POD/
GP2[15]/
GP1[0]
TM64P2_IN12
/
SPI1_SCS[0]/
SPI1_SCS[3]/
/
EPWM1B/
UART1_RXD/
PRU0_R30[7]/
E
SATA_LED/
GP2[14]/
GP1[1]
TM64P3_IN12
SPI0_SCS[4]/
SPI0_CLK/
UART0_TXD/
EPWM0A/
D
GP8[3]/
GP1[8]/
MII_RXCLK
MII_RXD[2]
SPI0_SIMO/
SPI0_SCS[5]/
EPWMSYNCO/
UART0_RXD/
C
GP8[5]/
GP8[4]/
MII_CRS
MII_RXD[3]
EMA_WAIT[0]/
EMA_WAIT[1]/
PRU0_R30[0]/
PRU0_R30[1]/
B
GP3[8]/
GP2[1]/
PRU0_R31[0]
PRU0_R31[1]
EMA_CS[0]/
V
SS
A
GP2[0]
18
19
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