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AM1808
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
6.14.2 SATA Interface
This section provides the timing specification for the SATA interface as a PCB design and manufacturing
specification. The design rules constrain PCB trace length, PCB trace skew, signal integrity, cross-talk,
and signal timing. TI has performed the simulation and system design work to ensure the SATA interface
requirements are met.
6.14.2.1 SATA Interface Schematic
Figure 6-28
shows the SATA interface schematic.
6.14.2.2 Compatible SATA Components and Modes
Table 6-43
shows the compatible SATA components and supported modes. Note that the only supported
configuration is an internal cable from the processor host to the SATA device.
PARAMETER
Transfer Rates
Backplane
Internal Cable
130
Peripheral Information and Electrical Specifications
SATA Interface(Processor)
10nF
SATA_TXN
SATA_TXP
10nF
10nF
SATA_RXN
SATA_RXP
10nF
10nF
SATA_REFCLKN
SATA_REFCLKP
10nF
SATA_REG
Figure 6-28. SATA Interface High Level Schematic
Table 6-43. SATA Supported Modes
eSATA
xSATA
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SATA Connector
TX–
TX+
RX–
RX+
LVDS
Oscillator
CLK–
CLK+
0.1uF
MIN
MAX
1.5
3.0
Copyright © 2010–2014, Texas Instruments Incorporated
AM1808
www.ti.com
UNIT
SUPPORTED
Gbps
No
No
No
Yes
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