Tcu Associated Registers - Intel 386 User Manual

Embedded microprocessor
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Intel386™ EX EMBEDDED PROCESSOR USER'S MANUAL
Expanded
Register
Address
P3CFG
0F824H
PINCFG
0F826H
(read/write)
TMRCFG
0F834H
(read/write)
TMRCON
0F043H
TMR0
0F040H
TMR1
0F041H
TMR2
0F042H
10-4
Table 10-2. TCU Associated Registers
PC/AT*
Address
Peripheral Pin Selections:
These registers determine whether a counter's input and output
signals are connected to package pins.
Timer Configuration:
Enables the counter's CLKIN n input signal, selects the CLKIN n
connection (PSCLK or TMRCLK n ) for each counter, and either
connects TMRGATE n or V
or sets GATE n high or low through register bits.
0043H
TMRCON has three formats: control word, counter-latch, and read-
back. When writing to TMRCON, certain bit settings determine which
format is accessed.
Control Word Format :
Programs a specific counter. Selects a counter's operating mode and
count format. After programming a counter, you can write a count
value to the counter's TMR n register at any time.
Counter-latch Format :
Issues a counter-latch command to a specific counter. The counter-
latch command allows you to latch the count of a specified counter.
After issuing a counter-latch command, you can check the counter's
count by reading the counter's TMR n register.
Read-back Format :
Issues a read-back command to one or more counters. The read-
back command allows you to latch the count and status of one or
more counters. After issuing the read-back command, you can check
the counter's status by reading the counter's TMR n register. After
checking a counter's status, you can read the counter's TMR n
register again to check its count.
0040H
Status Format:
Read this register after issuing a read-back command to check
0041H
0042H
counter n 's status. Reading TMR n again accesses its read format.
Read Format :
Read this register to check counter n 's count value.
Write Format :
Write this register at any time after initializing counter n to change the
counter's count value.
Function
to each counter's GATE n input signal,
CC

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