Single Data-Transfer Mode With Chaining Buffer-Transfer Mode - Intel 386 User Manual

DMA gains bus control, transfers one byte
or word of data, decrements byte count, and
DMA is programmed
with the new addresses
and byte count.
No new transfer information, so channel
Figure 12-10. Single Data-transfer Mode with Chaining Buffer-transfer Mode
After initialization, the DMA channel is
programmed with the requester and
target addresses and a byte count.
DREQ n
active?
Yes
then relinquishes bus control.
Is there
a new process
to set up?
No
Byte
count = FFFFFFH
or EOP#
No
active?
Yes
Was the
channel set up
for a new
Yes
process?
No
becomes idle.
DMA CONTROLLER
No
Write new requester and
target addresses and a
new byte count.
Yes
A2335-02
12-17