Nonpipelined Address Write Cycles - Intel 386 User Manual

Intel386™ EX EMBEDDED MICROPROCESSOR USER'S MANUAL
CLKOUT
BHE#, BLE#, A25:1
M/IO#, D/C#
REFRESH#
READY#
LOCK#
6-18
Idle Cycle 1
Nonpipelined
External
(Write)
[Late Ready]
Ti T1 T2
CLK2
Valid1
W/R#
WR#
RD#
ADS#
NA#
End Cycle 1
LBA#
BS8#
Valid 1
Out 1
D15:0
Figure 6-6. Nonpipelined Address Write Cycles
Cycle 2
Idle
Nonpipelined
External
(Write)
[Early Ready]
T1 T2 T2 Ti
Valid2
End Cycle 2
Valid 2
Out 2
A2488-02