Port 1 Configuration Register (P1Cfg) - Intel 386 User Manual

Intel386™ EX EMBEDDED MICROPROCESSOR USER'S MANUAL
Use P1CFG bits 4:0 to connect SIO0 signals to package pins.
Port 1 Configuration
P1CFG
(read/write)
7
PM7 PM6
Bit Bit
Number Mnemonic
7 PM7
6 PM6
5 PM5
4 PM4
3 PM3
2 PM2
1 PM1
0 PM0
Figure 11-8. Port 1 Configuration Register (P1CFG)
11-18
PM5 PM4
Pin Mode:
0 = Selects P1.7 at the package pin.
1 = Selects HLDA at the package pin.
Pin Mode:
0 = Selects P1.6 at the package pin.
1 = Selects HOLD at the package pin.
Pin Mode:
0 = Selects P1.5 at the package pin.
1 = Selects LOCK# at the package pin.
Pin Mode:
0 = Selects P1.4 at the package pin.
1 = Selects RI0# at the package pin.
Pin Mode:
0 = Selects P1.3 at the package pin.
1 = Selects DSR0# at the package pin.
Pin Mode:
0 = Selects P1.2 at the package pin.
1 = Selects DTR0# at the package pin.
Pin Mode:
0 = Selects P1.1 at the package pin.
1 = Selects RTS0# at the package pin.
Pin Mode:
0 = Selects P1.0 at the package pin.
1 = Selects DCD0# at the package pin.
Expanded Addr: F820H
ISA Addr: —
Reset State: 00H
PM3 PM2 PM1
Function
0
PM0