Overlapping Regions; Enabling The Mpu; Registers; General-Purpose Registers - Intel NIOS II Owner Reference Manual

3. Programming Model
NII-PRG | 2018.04.18

3.3.2. Overlapping Regions

The memory addresses of regions can overlap. Overlapping regions have several uses
including placing markers or small holes inside of a larger region. For example, the
stack and heap may be located in the same region, growing from opposite ends of the
address range. To detect stack/heap overflows, you can define a small region between
the stack and heap with no access permissions and assign it a higher priority than the
larger region. Any access attempts to the hole region trigger an exception informing
system software about the stack/heap overflow.
If regions overlap so that a particular access matches more than one region, the
region with the highest priority (lowest index) determines the access permissions and
default cacheability.

3.3.3. Enabling the MPU

The MPU is disabled on system reset. System software enables and disables the MPU
by writing to a control register. Before enabling the MPU, you must create at least one
instruction and one data region, otherwise unexpected results can occur. Refer to the
Working with the MPU section for more information.
Related Information
Working with the MPU

3.4. Registers

The Nios II register set includes general-purpose registers and control registers. In
addition, the Nios II/f core can optionally have shadow register sets. This section
discusses each register type.

3.4.1. General-Purpose Registers

The Nios II architecture provides thirty-two 32-bit general-purpose registers,
through
r31
the register (
zero
effect. The
implicitly accessed by the
use a common procedure-call convention, assigning specific meaning to registers
through
r23
Table 11. The Nios II General-Purpose Registers
Register Name
r0 zero
r1 at
r2
r3
r4
r5
on page 68
. Some registers have names recognized by the assembler. For example,
) always returns the value zero, and writing to
r0
register ( ) holds the return address used by procedure calls and is
ra r31
,
call callr
and through .
r26 r28
Function
0x00000000
Assembler temporary
Return value
Return value
Register arguments
Register arguments
and instructions. C and C++ compilers
ret
Register Name
r16
r17
r18
r19
r20
r21
Nios II Processor Reference Guide
r0
has no
zero
r1
Function
Callee-saved register
Callee-saved register
Callee-saved register
Callee-saved register
Callee-saved register
Callee-saved register
continued...
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