Nonpipelined Address Read Cycles - Intel 386 User Manual

Idle
Ti
CLK2
CLKOUT
BHE#, BLE#, A25:1
M/IO#, D/C#
REFRESH#
W/R#
WR#
RD#
ADS#
NA#
READY#
LBA#
BS8#
LOCK#
D15:0
Figure 6-5. Nonpipelined Address Read Cycles
Cycle 1 Cycle 2
Non-pipelined Non-pipelined
External External
(Read) (Read)
T1 T2 T1 T2
Valid1
Valid2
End Cycle
Valid1 Valid2
In1
BUS INTERFACE UNIT
Idle
T2 Ti
End Cycle
In2
A2487-03
6-15