Peripheral Register Addresses - Intel 386 User Manual

SYSTEM REGISTER QUICK REFERENCE
D.1

PERIPHERAL REGISTER ADDRESSES

Table D-1. Peripheral Register Addresses (Sheet 1 of 6)
Expanded PC/AT
Address Address
F000H 0000H
F001H 0001H
F002H 0002H
F003H 0003H
F004H 0004H
F005H 0005H
F006H 0006H
F007H 0007H
F008H 0008H
F009H 0009H
F00AH 000AH
F00BH 000BH
F00CH 000CH
F00DH 000DH
F00EH 000EH
F00FH 000FH
F010H
F011H
F012H
F013H
F014H
F015H
F016H
F017H
F018H
NOTES:
1. Byte pointer in flip-flop in DMA determines which register is accessed.
2. Shaded rows indicate reserved areas.
Access Type
(Byte/Word)
DMA Controller and Bus Arbiter
Byte DMA0TAR0/1 (Note 1)
Byte DMA0BYC0/1 (Note 1)
Byte DMA1TAR0/1 (Note 1)
Byte DMA1BYC0/1 (Note 1)
Reserved
Reserved
Reserved
Reserved
Byte DMACMD1/DMASTS
Byte DMASRR
Byte DMAMSK
Byte DMAMOD1
Byte DMACLRBP
Byte DMACLR
Byte DMACLRMSK
Byte DMAGRPMSK
Byte DMA0REQ0/1
Byte DMA0REQ2/3
Byte DMA1REQ0/1
Byte DMA1REQ2/3
Reserved
Reserved
Reserved
Reserved
Byte DMABSR
APPENDIX D
Register Name Reset Value
XX
XX
XX
XX
00H
00H
04H
00H
Not a register
Not a register
Not a register
03H
XX
XX
XX
XX
X1X10000B
D-1