Dmamod1; D.16 Dmamod1 - Intel 386 User Manual

Embedded microprocessor
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D.16 DMAMOD1

DMA Mode 1

DMAMOD1

(write only)
7
DTM1
DTM0
Bit
Bit
Number
Mnemonic
7–6
DTM1:0
5
TI
4
AI
3–2
TD1:0
1
0
0
CS
TI
AI
Data-transfer Mode:
00 = Demand
01 = Single
10 = Block
11 = Cascade
Target Increment/Decrement:
0 = Causes the target address to be incremented after each data
transfer in a buffer transfer.
1 = Causes the target address for the channel specified by bit 0 to be
decremented after each data transfer in a buffer transfer. Note that it
does not decrement words. When decrementing it will do two byte
transfers for a word.
Note: When the target address is programmed to remain constant
(DMAMOD2.2 = 1), this bit is a don't care.
Autoinitialize:
0 = Disables the autoinitialize buffer-transfer mode for the channel
specified by bit 0.
1 = Enables the autoinitialize buffer-transfer mode for the channel
specified by bit 0.
Transfer Direction:
Determines the transfer direction for the channel specified by bit 0.
00 = Target is read; nothing is written (used for testing)
01 = Data is transferred from the requester to the target
10 = Data is transferred from the target to the requester
11 = Reserved
Note: In cascade mode, these bits become don't cares.
Must be 0 for correct operation.
Channel Select:
0 = The selections for bits 7–2 affect channel 0.
1 = The selections for bits 7–2 affect channel 1.
SYSTEM REGISTER QUICK REFERENCE
Expanded Addr:
F00BH
ISA Addr:
000BH
Reset State:
00H
TD1
TD0
Function
0
0
CS
D-21

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