Bus Interface Unit Operation During Idle Mode; Watchdog Timer Unit Operation During Idle Mode; Smm Interaction With Idle And Powerdown Modes - Intel 386 User Manual

Embedded microprocessor
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Halt Instruction
with Powerdown
Flag Set
Powerdown
RSM with
Powerdown Flag
and Halt Restart
Slot Set
Reset or
RSM Instruction
with Halt Restart
Slot Clear
Figure 8-3. SMM Interaction with Idle and Powerdown Modes
8.1.2.2

Bus Interface Unit Operation During Idle Mode

The bus interface unit (BIU) can process DMA, DRAM refresh, and external hold requests during
idle mode. When the first request occurs, the core wakes up long enough to relinquish bus control
to the bus arbiter, then returns to idle mode. For the remaining time in idle mode, the bus arbiter
controls the bus. DMA, DRAM refresh, and external hold requests are processed in the same way
as during normal operation.
8.1.2.3

Watchdog Timer Unit Operation During Idle Mode

When the watchdog timer unit is in system watchdog mode, idle mode stops the down-counter.
Since no software can run while the CPU is idle, a software watchdog is not needed. When it is
in bus monitor or general-purpose timer mode, the watchdog timer unit continues to run while the
device is in idle mode. (Chapter 17 describes the watchdog timer unit.)
Mode
Management
CLOCK AND POWER MANAGEMENT UNIT
Normal
Operation
System
Mode
Halt Instruction
with Idle Flag Set
Idle
Mode
RSM Instruction
with Idle Flag and
Halt Restart Slot Set
A2229-03
8-5

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