Intel 386 User Manual page 297

Intel386™ EX EMBEDDED MICROPROCESSOR USER'S MANUAL
The receiver contains a receive buffer full (RBF) flag and flags for each of the error conditions
described above. At reset, RBF and each of the error flags (PE, FE, OE, and BI) are clear, indi-
cating that the receive buffer is empty, and no error has occurred. When a character is received
the receiver checks for parity, framing or break errors, and sets the appropriate bits, if necessary.
It then shifts the data into the receive buffer, sets the OE bit if an overrun occurs, and then sets
the RBF flag. Reading the receive buffer clears the RBF flag and any error flags in the LSR that
may have been set, except for the OE bit. The OE bit is cleared by reading the LSR.
High speed serial transfers may require using the DMA to eliminate interrupt latency time in ser-
vicing the SIO. Since the SIO unit clears the error bits in the line status register each time the re-
ceive buffer register is read, it would be impossible to detect an error using DMA. Because of
this, two RBF signals are used:
•
One RBF signal (RBFDMA) goes directly to the DMA unit. This signal is blocked when an
error (parity, overrun, break, or framing) occurs. This prevents a DMA request from being
generated by the RBF.
•
The other RBF signal (RBFINT) goes directly to the interrupt priority logic and out on
SIOINT if enabled in the Interrupt Enable Register.
When the Interrupt Enable Register is programmed to generate an SIOINT on receiver errors, the
error can be serviced as part of the interrupt handler.
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