Intel 386 User Manual page 656

Embedded microprocessor
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Table E-1. Instruction Set Summary (Sheet 18 of 19)
Instruction
PREFIX BYTES
Address size prefix
0 1 1 0 0 1 1 1
LOCK = Bus lock prefix
1 1 1 1 0 0 0 0
Operand size prefix
0 1 1 0 0 1 1 0
Segment override prefix
CS:
0 0 1 0 1 1 1 0
DS:
0 0 1 1 1 1 1 0
ES:
0 0 1 0 0 1 1 0
FS:
0 1 1 0 0 1 0 0
GS:
0 1 1 0 0 1 0 1
SS:
0 0 1 1 0 1 1 0
PROTECTION CONTROL
ARPL = adjust requested privilege level
from register/memory
0 1 1 0 0 0 1 1
LAR = load access rights
from register/memory
0 0 0 0 1 1 1 1
LGDT = load global descriptor
table register
0 0 0 0 1 1 1 1
LIDT = load interrupt descriptor
table register
0 0 0 0 1 1 1 1
LLDT = load local descriptor
table register to
0 0 0 0 1 1 1 1
register/memory
LMSW = load machine status word
from register/memory
0 0 0 0 1 1 1 1
LSL = load segment limit
from register memory
0 0 0 0 1 1 1 1
Byte-Granular limit
Page-Granular limit
LTR = load task register
from register/memory
0 0 0 0 1 1 1 1
SGDT = store global descriptor
table register
0 0 0 0 1 1 1 1
SIDT = store interrupt descriptor
Format
mod reg r/m
0 0 0 0 0 0 1 0
mod reg r/m
0 0 0 0 0 0 0 1
mod 0 1 0 r/m
0 0 0 0 0 0 0 1
mod 0 1 1 r/m
0 0 0 0 0 0 0 0
mod 0 1 0 r/m
0 0 0 0 0 0 0 1
mod 1 1 0 r/m
0 0 0 0 0 0 1 1
mod reg r/m
0 0 0 0 0 0 0 0
mod 0 0 1 r/m
0 0 0 0 0 0 0 1
mod 0 0 0 r/m
INSTRUCTION SET SUMMARY
Clock Count
Notes
Real
Pro-
Real
Ad-
tected
Ad-
dress
Virtual
dress
Mode
Ad-
Mode
or
dress
or
Virtual
Mode
Virtual
8086
8086
Mode
Mode
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
N/A
20/21**
a
N/A
15/16*
a
11*
11*
b, c
11*
11*
b, c
N/A
20/24*
a
10/13
10/13*
b, c
N/A
20/21*
a
N/A
25/26*
a
N/A
23/27*
a
9*
9*
b, c
Pro-
tected
Virtual
Ad-
dress
Mode
m
h
g, h, j, p
h, l
h, l
g, h, j, l
h, l
g, h, j, p
g, h, j, p
g, h, j, l
h
E-19

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