Hardware Departures From Pc/At System Architecture; Dma Unit; B.1.1 Dma Unit - Intel 386 User Manual

The Intel386™ EX embedded processor is NOT 100% PC/AT* compatible. Due to compatibility
issues, not all PC software executes on the Intel386 EX processor. In addition, not all ISA/PC-
104 cards operate in an Intel386 EX processor system.
It is the responsibility of the designer to determine if a specific PC/AT software or hardware pack-
age operates on an Intel386 EX processor system. Typically an embedded PC can be very differ-
ent from a traditional desktop PC's system. The embedded PC may have more or less
functionality than a desktop PC. It is important for the designer to evaluate the requirements of
the PC software or hardware that is expected to operate on the Intel386 EX processor system.
This appendix is organized as follows:
•
Hardware Departures from PC/AT System Architecture (see below)
•
Software Considerations for a PC/AT System Architecture (page B-5)
B.1

HARDWARE DEPARTURES FROM PC/AT SYSTEM ARCHITECTURE

This appendix describes the areas in which the Intel386 EX processor departs from a standard
PC/AT system architecture and explains how to work around those departures if necessary. Chap-
ter 5, "DEVICE CONFIGURATION", shows an example configuration for a PC/AT-compatible
system
B.1.1

DMA Unit

The PC/AT architecture uses two 8237A DMA controllers, connected in cascade, for a total of
seven channels. One DMA controller allows byte transfers and the other allows word transfers.
However, the 8237A has two major restrictions:
•
It has only 16-bit addressing capability. This requires a page register to allow address
extension for a system based on a processor like the Intel386 EX processor, with 26-bit (64
Mbyte) physical memory addressing capability. A page register implementation is
cumbersome and degrades the system performance.
•
The 8237A has no natural two-cycle data transfer mode to allow memory-to-memory
transfers. Instead, two DMA channels have to be used in a very specific manner.
Transferring data between memory and memory-mapped I/O devices, common in
embedded applications, would not be easy.
COMPATIBILITY WITH THE PC/AT*
APPENDIX B
ARCHITECTURE
B-1