Remapcfg; D.51 Remapcfg - Intel 386 User Manual

Embedded microprocessor
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D.51 REMAPCFG

Address Configuration Register

REMAPCFG

15
ESE
7
S1R
Bit
Bit
Number
Mnemonic
15
ESE
14–7
6
S1R
5
S0R
4
ISR
3
IMR
2
DR
1
0
TR
S0R
ISR
0 = Disables expanded I/O space
1 = Enables expanded I/O space
Reserved.
0 = Makes serial channel 1 (COM2) accessible in both DOS I/O space
and expanded I/O space
1 = Remaps serial channel 1 (COM2) address into expanded I/O space
0 = Makes serial channel 0 (COM1) accessible in both DOS I/O space
and expanded I/O space
1 = Remaps serial channel 0 (COM1) address into expanded I/O space
0 = Makes the slave 82C59A interrupt controller accessible in both DOS
I/O space and expanded I/O space
1 = Remaps slave 82C59A interrupt controller address into expanded
I/O space
0 = Makes the master 82C59A interrupt controller accessible in both
DOS I/O space and expanded I/O space
1 = Remaps master 82C59A interrupt controller address into expanded
I/O space
0 = Makes the DMA address accessible in both DOS I/O space and
expanded I/O space
1 = Remaps DMA address into expanded I/O space
Reserved.
0 = Makes the timer control unit accessible in both DOS I/O space and
expanded I/O space
1 = Remaps timer control unit address into expanded I/O space
SYSTEM REGISTER QUICK REFERENCE
Expanded Addr:
0022H
PC/AT Address:
0022H
Reset State:
0000H
IMR
DR
Function
8
0
TR
D-53

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