Port92; D.48 Port92 - Intel 386 User Manual

Intel386™ EX EMBEDDED MICROPROCESSOR USER'S MANUAL

D.48 PORT92

Port 92 Configuration

PORT92

(read/write)
7
— —
Bit Bit
Number Mnemonic
7–2 —
1 A20G
0 CPURST
D-50
— —
Reserved. These bits are undefined; for compatibility with future devices,
do not modify these bits.
A20 Grounded:
0 = Clearing this bit forces address line A20 to 0. This bit affects
addresses generated only by the core. Addresses generated by the
DMA and the Refresh Unit are not affected by this bit.
1 = Setting this bit leaves core-generated addresses unmodified.
CPU Reset:
0 = Clearing this bit performs no operation.
1 = Setting this bit resets the core without resetting the peripherals.
This bit must be cleared before issuing another reset.
Expanded Addr: F092H
ISA Addr: 0092H
Reset State: XXXXXX10B
— — A20G
Function
0
CPURST