Bus Cycle Length Adjustments For Overlapping Regions - Intel 386 User Manual

Intel386™ EX EMBEDDED MICROPROCESSOR USER'S MANUAL
Is any
channel
Wait for smallest number
dependent on
of all overlapping regions'
external Yes
wait state values.
ready?
No
Wait
State
READY#
Wait for largest number of
asserted? No
all overlapping regions'
wait state values.
Yes
Complete bus cycle.
A2392-02
Figure 14-3. Bus Cycle Length Adjustments for Overlapping Regions
14-12