Receive Buffer Register (Rbr N ) - Intel 386 User Manual

Intel386™ EX EMBEDDED MICROPROCESSOR USER'S MANUAL

11.3.5 Receive Buffer Register (RBR n )

Read RBRn to obtain the last data word received. Use the interrupt control or DMA units or poll
the serial line status register (LSRn) to determine whether the receive buffer is full.
Receive Buffer
RBR0, RBR1
(read only)
7
RB7 RB6
Bit Bit
Number Mnemonic
7–0 RB7:0
NOTE: The receive buffer register shares an address port with other SIO registers. Bit 7 (DLAB) of
the LCR n must be cleared in order to read the receive buffer register.
11-24
RB5 RB4
Receive Buffer Bits:
These bits make up the last word received. The receiver shifts bits in,
starting with the least-significant-bit. The receiver then strips off the
asynchronous bits (start, parity, and stop) and transfers the received
data bits from the receive shift register to the receive buffer.
Figure 11-14. Receive Buffer Register (RBR n )
RBR0
Expanded Addr: F4F8H
ISA Addr: 03F8H
Reset State: XXH
RB3 RB2
Function
RBR1
F8F8H
02F8H
XXH
0
RB1 RB0