Port 3 Configuration Register (P3Cfg) - Intel 386 User Manual

Intel386™ EX EMBEDDED PROCESSOR USER'S MANUAL
The peripheral pin selection registers (P3CFG and PINCFG) determine whether each counter's
OUTn signal is connected to its TMROUTn pin. See Figure 10-1 for the TCU signal connections.
For details on the P3CFG and PINCFG registers see Figure 10-23 and Figure 10-24. The counter
output signals are automatically connected to the interrupt control unit. Counter 1's output signal
(OUT1) is automatically connected to DMA channel 0, and counter 2's output signal (OUT2) is
automatically connected to DMA channel 1.
Use P3CFG bits 0 and 1 to connect TMROUT0 and TMROUT1 to package pins.
Port 3 Configuration
P3CFG
(read/write)
7
PM7 PM6
Bit Bit
Number Mnemonic
7 PM7
6 PM6
5 PM5
4 PM4
3 PM3
2 PM2
1 PM1
0 PM0
Figure 10-23. Port 3 Configuration Register (P3CFG)
10-22
PM5 PM4
Pin Mode:
0 = Selects P3.7 at the package pin.
1 = Selects COMCLK at the package pin.
Pin Mode:
0 = Selects P3.6 at the package pin.
1 = Selects PWRDOWN at the package pin.
Pin Mode:
0 = Selects P3.5 at the package pin.
1 = Connects master IR7 to the package pin (INT3).
Pin Mode:
0 = Selects P3.4 at the package pin.
1 = Connects master IR6 to the package pin (INT2).
Pin Mode:
0 = Selects P3.3 at the package pin.
1 = Connects master IR5 to the package pin (INT1).
Pin Mode:
0 = Selects P3.2 at the package pin.
1 = Connects master IR1 to the package pin (INT0).
Pin Mode:
See Table 5-1 on page 5-8 for all the PM1 configuration options.
Pin Mode:
See Table 5-1 on page 5-8 for all the PM0 configuration options.
Expanded Addr: F824H
ISA Addr: —
Reset State: 00H
PM3 PM2 PM1
Function
0
PM0