Msr N - Intel 386 User Manual

D.36 MSR n
Modem Status
MSR0, MSR1
(read only)
7
DCD RI
Bit Bit
Number Mnemonic
7 DCD
6 RI
5 DSR
4 CTS
3 DDCD
2 TERI
1 DDSR
0 DCTS
DSR CTS
Data Carrier Detect:
This bit is the complement of the data carrier detect (DCD n #) input. In
diagnostic test mode, this bit is equivalent to MCR n .3 (OUT2).
Ring Indicator:
This bit is the complement of the ring indicator (RI n #) input. In diagnostic
test mode, this bit is equivalent to MCR n .2 (OUT1).
Data Set Ready:
This bit is the complement of the data set ready (DSR n #) input. In
diagnostic test mode, this bit is equivalent to MCR n .0 (DTR).
Clear to Send:
This bit is the complement of the clear to send (CTS n #) input. In
diagnostic test mode, this bit is equivalent to MCR n .1 (RTS).
Delta Data Carrier Detect:
When set, this bit indicates that the DCD n # input has changed state
since the last time this register was read. Reading this register clears
this bit.
Trailing Edge Ring Indicator:
When set, this bit indicates that the RI n # input has changed from a low
to a high state since the last time this register was read. Reading this
register clears this bit.
Delta Data Set Ready:
When set, this bit indicates that the DSR n # input has changed state
since the last time this register was read. Reading this register clears
this bit.
Delta Clear to Send:
When set, this bit indicates that the CTS n # input has changed state
since the last time this register was read. Reading this register clears
this bit.
SYSTEM REGISTER QUICK REFERENCE
MSR0
Expanded Addr:
F4FEH
ISA Addr:
03FEH
Reset State:
X0H
DDCD TERI
Function
MSR1
F8FEH
02FEH
X0H
0
DDSR DCTS
D-39