Pin Configuration Register (Pincfg) - Intel 386 User Manual

13.3.1 Pin Configuration Register (PINCFG)

The serial receive clock (SRXCLK) and transmit serial data (SSIOTX) pins are multiplexed with
other functions. Use PINCFG bits 0 and 1 to select the pin functions.
Pin Configuration
PINCFG
(read/write)
7
— PM6
Bit Bit
Number Mnemonic
7 —
6 PM6
5 PM5
4 PM4
3 PM3
2 PM2
1 PM1
0 PM0
Figure 13-15. Pin Configuration Register (PINCFG)
PM5 PM4
Reserved. This bit is undefined; for compatibility with future devices, do
not modify this bit.
Pin Mode:
0 = Selects CS6# at the package pin.
1 = Selects REFRESH# at the package pin.
Pin Mode:
0 = Selects the coprocessor signals, PEREQ, BUSY#, and ERROR#, at
the package pins.
1 = Selects the timer control unit signals, TMROUT2, TMRCLK2, and
TMRGATE2, at the package pins.
Pin Mode:
0 = Selects DACK0# at the package pin.
1 = Selects CS5# at the package pin.
Pin Mode:
0 = Selects EOP# at the package pin.
1 = Selects CTS1# at the package pin.
Pin Mode:
0 = Selects DACK1# at the package pin.
1 = Selects TXD1 at the package pin.
Pin Mode:
0 = Selects SRXCLK at the package pin.
1 = Selects DTR1# at the package pin.
Pin Mode:
0 = Selects SSIOTX at the package pin.
1 = Selects RTS1# at the package pin.
SYNCHRONOUS SERIAL I/O UNIT
Expanded Addr: F826H
ISA Addr: —
Reset State: 00H
PM3 PM2 PM1
Function
0
PM0
13-17