Intel386™ EX EMBEDDED MICROPROCESSOR USER'S MANUAL
Device Pin or
Signal
Internal Signal
TXEDMA n
Internal Signal
RBFDMA n
Internal Signal
11.2 SIO OPERATION
The following sections describe the operation of the baud-rate generator, transmitter, and receiver
and discusses the modem control logic, SIO diagnostic mode, and SIO interrupt sources.
11.2.1 Baud-rate Generator
Each SIO channel's baud-rate generator provides the clocking source for the channel's transmitter
and receiver. The baud-rate generator can divide its input (BCLKIN) by any divisor from 1 to
16
(2
–1). The output frequency is 16 times the desired bit time. The transmitter shifts data out on
the rising edge of BCLKIN. The receiver samples input data in the middle of a bit time.
The internal serial clock (SERCLK) signal or the COMCLK pin can be connected to the baud-
rate generator's BCLKIN signal (Figure 11-2). The SIO configuration register (SIOCFG) selects
one of these sources.
CLK2
÷ 2
COMCLK
(pin mux)
Figure 11-2. SIO n Baud-rate Generator Clock Sources
SERCLK provides a baud-rate input frequency (BCLKIN) of CLK2/4. The COMCLK pin allows
an external source with a maximum frequency of CLK2/4 to provide the baud-rate generator in-
put frequency.
11-4
Table 11-1. SIO Signals
Transmitter Empty:
When this signal is high, the Transmitter Holding Register is empty
(transmit data has been loaded into the Transmit Shift Register).
Receiver Full:
When high, this signal indicates that the Receive Buffer has been
loaded with data from the Receive Shift Register.
SIOCFG. n
SERCLK
÷ 2
1
0
Description
SIO n
Baud-rate
Generator
Baud Rate
Generator
BCLKIN
Output
Frequency
A2524-02
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