E-7 Encoding Of 16-Bit Address Mode With "Mod R/M" Byte - Intel 386 User Manual

Table E-7. Encoding of 16-bit Address Mode with "mod r/m" Byte
mod r/m Effective Address
00 000 DS:[BX + SI]
00 001 DS:[BX + DI]
00 010 SS:[BP + SI]
00 011 SS:[BP + DI]
00 100
00 101
00 110
00 111
01 000 DS:[BX + SI + d8]
01 001 DS:[BX + DI + d8]
01 010 SS:[BP + SI + d8]
01 011 SS:[BP + DI + d8]
01 100 DS:[SI + d8]
01 101 DS:[DI + d8]
01 110 SS:[BP + d8]
01 111 DS:[BX + d8]
DS:[SI]
DS:[DI]
DS:d16
DS:[BX]
INSTRUCTION SET SUMMARY
mod r/m Effective Address
10 000 DS:[BX + SI + d16]
10 001 DS:[BX + DI + d16]
10 010 SS:[BP + SI + d16]
10 011 SS:[BX + DI + d16]
10 100
10 101
10 110 SS:[BP + d16]
10 111 DS:[BX + d16]
11 000 register - see tables below
11 001 register - see tables below
11 010 register - see tables below
11 011 register - see tables below
11 100 register - see tables below
11 101 register - see tables below
11 110 register - see tables below
11 111
register - see tables below
Register Specified by r/m
During 16-bit Data Operations
Function of w Field
mod r/m
(when w = 0)
11 000 AL
11 001 CL
11 010 DL
11 011 BL
11 100 AH
11 101 CH
11 110 DH
11 111 BH
Register Specified by r/m
During 32-bit Data Operations
Function of w Field
mod r/m
(when w = 0)
11 000 AL
11 001 CL
11 010 DL
11 011 BL
11 100 AH
11 101 CH
11 110 DH
11 111 BH
DS:[SI + d16]
DS:[DI + d16]
(when w = 1)
AX
CX
DX
BX
SP
BP
SI
DI
(when w = 1)
EAX
ECX
EDX
EBX
ESP
EBP
ESI
EDI
E-27