Sio And Ssio Configuration Register (Siocfg) - Intel 386 User Manual

Intel386™ EX EMBEDDED MICROPROCESSOR USER'S MANUAL

13.3.2 SIO and SSIO Configuration Register (SIOCFG)

Use SIOCFG bit 2 to connect either PSCLK or SERCLK to the baud-rate generator's input
(BCLKIN).
SIO and SSIO Configuration
SIOCFG
(read/write)
7
S1M S0M
Bit Bit
Number Mnemonic
7 S1M
6 S0M
5–3 —
2 SSBSRC
1 S1BSRC
0 S0BSRC
Figure 13-16. SIO and SSIO Configuration Register (SIOCFG)
13-18
— —
SIO1 Modem Signal Connections:
0 = Connects the SIO1 modem input signals to the package pins.
1 = Connects the SIO1 modem input signals internally.
SIO0 Modem Signal Connections:
0 = Connects the SIO0 modem input signals to the package pins.
1 = Connects the SIO0 modem input signals internally.
Reserved. These bits are undefined; for compatibility with future devices,
do not modify these bits.
SSIO Baud-rate Generator Clock Source:
0 = Connects the internal PSCLK signal to the SSIO baud-rate
generator.
1 = Connects the internal SERCLK signal to the SSIO baud-rate
generator.
SIO1 Baud-rate Generator Clock Source:
0 = Connects the COMCLK pin to the SIO1 baud-rate generator.
1 = Connects the internal SERCLK signal to the SIO1 baud-rate
generator.
SIO0 Baud-rate Generator Clock Source:
0 = Connects the COMCLK pin to the SIO0 baud-rate generator.
1 = Connects the internal SERCLK signal to the SIO0 baud-rate
generator.
Expanded Addr: F836H
ISA Addr: —
Reset State: 00H
— SSBSRC S1BSRC
Function
0
S0BSRC