Source Low Band Operation - Agilent Technologies 8753ES Option 011 Service Manual

Source Low Band Operation

The low band frequency range is 300 kHz to 16 MHz. These frequencies are generated by
locking the A3 source to a reference signal. The reference signal is synthesized by mixing
down the fundamental output of the fractional-N VCO with a 40 MHz crystal reference
signal. Low band operation differs from high band in these respects: The reference
frequency for the A11 phase lock is not a fixed 1 MHz signal, but varies with the frequency
of the fractional-N VCO signal. The sampler diodes are biased on to pass the signal
through to the mixer. The 1st IF signal from the A4 sampler is not fixed but is identical to
the source output signal and sweeps with it. The following steps outline the low band
sweep sequence, illustrated in
1. A signal (FN LO) is generated by the fractional-N VCO. The VCO in the A14
Fractional-N assembly generates a CW or swept signal that is 4O MHz greater than the
start frequency. The signal is divided down to 100 kHz and phase locked in the A13
assembly, as in high band operation.
2. The fractional-N VCO signal is mixed with 40 MHz to produce a reference
signal. The signal (FN LO) from the Fractional-N VCO goes to the A12 reference
assembly, where it is mixed with the 4O MHz VCXO (voltage controlled crystal
oscillator). The resulting signal is the reference to the phase comparator in the A11
assembly.
3. The A3 source is pretuned. The signal (RF OUT) is fed to the A4 sampler. The
pretuned DAC in the A11 phase lock assembly sets the A3 source to a frequency 1 to
6 MHz above the start frequency. This signal (RF OUT) goes to the A4 R input
sampler/mixer assembly. (The source RF output must be connected externally to the R
input connector on the analyzer.)
4. The signal from the source is fed back (1st IF) to the phase comparator. The
source output signal passes directly through the sampler in the A4 assembly, because
the sampler is biased on. The signal (1st IF) is fed back unaltered to the phase
comparator in the A11 phase lock assembly. The other input to the phase comparator is
the heterodyned reference signal from the A12 assembly. Any frequency difference
between these two signals produces a proportional error voltage.
5. A tuning signal (YO DRIVE) tunes the source and phase lock is achieved. The
error voltage is used to drive the A3 source YIG oscillator to bring the YIG closer to the
reference frequency. The loop process continues until the source frequency and the
reference frequency are the same, and phase lock is achieved.
6. A synthesized sub sweep is generated. The source tracks the synthesizer.
When lock is achieved at the start frequency, the synthesizer starts to sweep. This
changes the phase lock reference frequency, and causes the source to track at a
difference frequency 40 MHz below the synthesizer.
Chapter 12
Figure 12-4.
Theory of Operation
Source Low Band Operation
12-17