Table 255. Sopd Pattern; Table 256. Parity Bit Calculation; Figure 469. Sai_Xdr Register Ordering - ST STM32L4 5 Series Reference Manual

RM0351
SOPD
B
W
M
The data stored in SAI_xDR has to be filled as follows:
•
SAI_xDR[26:24] contain the Channel status, User and Validity bits.
•
SAI_xDR[23:0] contain the 24-bit data for the considered channel.
If the data size is 20 bits, then data shall be mapped on SAI_xDR[23:4].
If the data size is 16 bits, then data shall be mapped on SAI_xDR[23:8].
SAI_xDR[23] always represents the MSB.
Note: The transfer is performed always with LSB first.
The SAI first sends the adequate preamble for each sub-frame in a block. The SAI_xDR is
then sent on the SD line (manchester coded). The SAI ends the sub-frame by transferring
the Parity bit calculated as described in
The underrun is the only error flag available in the SAI_xSR register for SPDIF mode since
the SAI can only operate in transmitter mode. As a result, the following sequence should be

Table 255. SOPD pattern

Preamble coding
last bit is 0 last bit is 1
11101000 00010111
11100100 00011011
11100010 00011101

Figure 469. SAI_xDR register ordering

Table 256. Parity bit calculation

SAI_xDR[26:0]
odd number of 0
odd number of 1
DocID024597 Rev 5
Channel A data at the start of block
Channel B data somewhere in the block
Channel A data
Table 256.
Parity bit P value transferred
Serial audio interface (SAI)
Description
0
1
1465/1830
1490