ST STM32L4 5 Series Reference Manual page 1505

RM0351
and if the DMA counter equals 17, it means that two buffers are ready for reading in the
RAM area.
In Multi software buffer reception mode, if the software is reading bits 24, 25 and 26 of the
8th word, it does not need to clear RXBERF, RXOVRF and RXBFF flags after each frame
reception.
44.3.9 Error management
Underrun during payload transmission
During the transmission of the frame payload, a transmit underrun is indicated by the
TXUNRF flag in the SWPMI_ISR register. An interrupt is generated if TXBUNREIE bit is set
in the SWPMI_IER register.
If a transmit underrun occurs, the SWPMI stops the payload transmission and sends a
corrupted CRC (the first bit of the first CRC byte sent is inverted), followed by an EOF. If
DMA is used, TXDMA bit in the SWPMI_CR register is automatically cleared.
Figure 485. SWPMI Multi software buffer mode reception
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Single Wire Protocol Master Interface (SWPMI)
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