Figure 483. Swpmi No Software Buffer Mode Reception - ST STM32L4 5 Series Reference Manual

Advanced arm-based 32-bit mcus
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Single Wire Protocol Master Interface (SWPMI)
Single software buffer mode
This mode allows to receive a complete SWP frame without any CPU intervention using the
DMA. The DMA transfers received data from the 32-bit SWPMI_RDR register to the RAM
memory, and the software can poll the end of the frame reception using the SWPMI_RBFF
flag.
The Single software buffer mode is selected by setting RXDMA bit and clearing RXMODE
bit in the SWPMI_CR register.
The DMA must be configured as follows:
The DMA channel or stream must be configured in following mode (refer to DMA section):
memory to memory mode disabled,
memory increment mode enabled,
memory size set to 32-bit,
peripheral size set to 32-bit,
peripheral increment mode disabled,
circular mode disabled,
data transfer direction set to read from peripheral,
the number of words to be transfered must be set to 8,
the source address is the SWPMI_RDR register,
the destination address is the SWP frame buffer in RAM.
Then the user must:
1.
Set RXDMA bit in the SWPMI_CR register
2.
Set RXBFIE bit in the SWPMI_IER register
3.
Enable stream or channel in DMA module.
A DMA request is issued by SWPMI when RXNE flag is set in SWPMI_ISR. The RXNE flag
is cleared automatically when the DMA is reading the SWPMI_RDR register.
In the SWPMI interrupt routine, the user must check RXBFF bit in the SWPMI_ISR register.
If it is set, the user must:
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Figure 483. SWPMI No software buffer mode reception

DocID024597 Rev 5
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