ST STM32L4 5 Series Reference Manual page 1612

Controller area network (bxCAN)
Bits 23:16 DATA6[7:0]
Data byte 2 of the message.
Bits 15:8 DATA5[7:0]
Data byte 1 of the message.
Bits 7:0 DATA4[7:0]
Data byte 0 of the message.
46.9.4 CAN filter registers
CAN filter master register (CAN_FMR)
Address offset: 0x200
Reset value: 0x2A1C 0E01
All bits of this register are set and cleared by software.
31 30 29
Res. Res. Res. Res.
15 14 13
Res. Res.
rw
Bits 31:14 Reserved, must be kept at reset value.
Bits 13:8 CANSB[5:0]
These bits are set and cleared by software. They define the start bank for the CAN interface
(Slave) in the range 1 to 27.
Bits 7:1 Reserved, must be kept at reset value.
Bit 0 FINIT
1612/1830
:
Data Byte 6
:
Data Byte 5
:
Data Byte 4
28 27 26 25
Res. Res. Res.
12 11 10 9
CANSB[5:0]
rw rw rw rw
:
CAN start bank
:
Filter initialization mode
Initialization mode for filter banks
0: Active filters mode.
1: Initialization mode for the filters.
DocID024597 Rev 5
24 23 22 21
Res. Res. Res. Res.
8 7 6 5
Res. Res. Res.
rw
20 19 18 17
Res. Res. Res. Res.
4 3 2 1
Res. Res. Res. Res.
RM0351
16
Res.
0
FINIT
rw