Glossary - Oracle SPARC M8 Service Manual

Hide thumbs Also See for SPARC M8:
Table of Contents

Advertisement

Glossary

A
Active SP
An SP selected by Oracle ILOM to manage server resources. When an Active SP can no longer
serve this role, the Standby SP assumes its role. See also
ASR
Auto Service Request. Oracle software that provides the ability to notify Oracle Support
automatically.
B
BoB
Memory buffer on board. An ASIC on a CMIOU board that transfers data between a DIMM
and a CMP.
C
CAR
Label of the
CMIOU
CPU, memory, and I/O unit. Each CMIOU contains 1 CMP, 16
Each CMIOU also hosts an
CMP
Chip multiprocessing. Each CMIOU contains 1 CMP. The SPARC M8-8 and SPARC M7-8
servers can contain a maximum of 8 CMPs. The SPARC M7-16 server can contain a maximum
of 16 CMPs.
CMT
Chip multithreading. Processor technology enabling multiple hardware threads (also known as
strands) to execute on the same chip, through multiple cores per chip, multiple threads per core,
or through a combination of both.
PCIe hot-plug
carrier.
eUSB
device.
SP
and
Standby
SP.
DIMM
slots, and 1
Glossary
IOH
chip.
317

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Sparc m7

Table of Contents