Watchdog Timer Operation In Stop Mode (When "Low-Speed Internal Oscillator Can Be Stopped By Software" Is Selected By Option Byte) - NEC 78K0S/KA1+ User Manual

9.4.3 Watchdog timer operation in STOP mode (when "low-speed internal oscillator can be stopped by
software" is selected by option byte)
The watchdog timer stops counting during STOP instruction execution regardless of whether the system clock or
low-speed internal oscillation clock is being used.
(1) When the watchdog timer operation clock is the clock to peripheral hardware (f
instruction is executed
When STOP instruction is executed, operation of the watchdog timer is stopped. After STOP mode is released,
operation stops for 34
stabilization time select register (OSTS) after operation stops in the case of crystal/ceramic oscillation) and then
counting is started again using the operation clock before the operation was stopped. At this time, the counter is
not cleared to 0 but holds its value.
Figure 9-6. Operation in STOP Mode (WDT Operation Clock: Clock to Peripheral Hardware)
Normal
operation
CPU operation
f
CPU
Watchdog timer
Operating
<2> CPU clock: High-speed internal oscillation clock or external clock input
CPU operation
f
CPU
Watchdog timer
Note The operation stop time is 17
CHAPTER 9 WATCHDOG TIMER
µ
s (TYP.) (after waiting for the oscillation stabilization time set by the oscillation
<1> CPU clock: Crystal/ceramic oscillation clock
Operation
Note
STOP stopped Oscillation stabilization time
Oscillation stopped
Operation stopped
Normal
STOP
operation
Oscillation stopped
Operating Operation stopped
µ
s (MIN.), 34
User's Manual U16898EJ3V0UD
Oscillation stabilization time
(set by OSTS register)
Operation
Normal operation
Note
stopped
Operating
µ µ
s (TYP.), and 67 s (MAX.).
) when the STOP
X
Normal operation
Operating
153