Analog Devices ADuCM320 Hardware Reference Manual page 95

ADuCM320 Hardware Reference Manual
GPIO
P2.5 2
P2.6
P2.7
GP3—GP3CON Controls These Bits
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7 3, 4
GP4—GP4CON Controls These Bits
P4.2
P4.3
P4.4
P4.5
P4.6
P4.7
GP5—GP5CON Controls These Bits
P5.0 3, 4
P5.1 3, 4
P5.2 3, 4
P5.3 3, 4
During the power-on reset, the ADuCM320
1
2 Not available as an external pin. Internal PLA elements connected to these pins can be used.
3 Never configure this pin as an output if associated VDAC output is enabled.
4 During the power-on reset, the ADuCM320
00 01
GPIO/IRQ7
(GP2CON[13:12] = 0x0)
GPIO/IRQ8
(GP2CON[15:14] = 0x0)
GPIO PRTADDR0
(GP3CON[1:0] = 0x0) (GP3CON[1:0] = 0x1)
GPIO PRTADDR1
(GP3CON[3:2] = 0x0) (GP3CON[3:2] = 0x1)
GPIO PRTADDR2
(GP3CON[5:4] = 0x0) (GP3CON[5:4] = 0x1)
GPIO PRTADDR3
(GP3CON[7:6] = 0x0) (GP3CON[7:6] = 0x1)
GPIO PRTADDR4
(GP3CON[9:8] = 0x0) (GP3CON[9:8] = 0x1)
GPIO MCLK
(GP3CON[11:10] = 0x0) (GP3CON[11:10] = 0x1)
MDIO
(GP3CON[13:12] = 0x1)
GPIO VDAC2
(GP3CON[15:14] = 0x0) (GP3CON[15:14] = 0x1)
GPIO AIN8
(GP4CON[5:4] = 0x0) (GP4CON[5:4] = 0x1)
GPIO AIN9
(GP4CON[7:6] = 0x0) (GP4CON[7:6] = 0x1)
GPIO AIN12
(GP4CON[9:8] = 0x0) (GP4CON[9:8] = 0x1)
GPIO AIN13
(GP4CON[11:10] = 0x0) (GP4CON[11:10] = 0x1)
GPIO AIN14
(GP4CON[13:12] = 0x0) (GP4CON[13:12] = 0x1)
GPIO AIN15
(GP4CON[15:14] = 0x0) (GP4CON[15:14] = 0x1)
GPIO VDAC3
(GP5CON[1:0] = 0x0) (GP5CON[1:0] = 0x1)
GPIO VDAC6
(GP5CON[3:2] = 0x0) (GP5CON[3:2] = 0x1)
GPIO VDAC7
(GP5CON[5:4] = 0x0) (GP5CON[5:4] = 0x1)
GPIO VDAC0
(GP5CON[7:6] = 0x0) (GP5CON[7:6] = 0x1)
dives the pin low for up to 200 µs.
can enable a pull-down current of 160 µA on this pin.
Rev. C | Page 95 of 196
Configuration Modes
10
UG-498
11
PLAO[20]
(GP2CON[13:12] = 0x3)
PLAO[21]
(GP2CON[15:14] = 0x3)
PLAI[12]
(GP3CON[1:0] = 0x3)
PLAI[13]
(GP3CON[3:2] = 0x3)
PLAI[14]
(GP3CON[5:4] = 0x3)
PLAI[15]
(GP3CON[7:6] = 0x3)
PLAO[26]
(GP3CON[9:8] = 0x3)
PLAO[27]
(GP3CON[11:10] = 0x3)
PLAO[29]
(GP3CON[15:14] = 0x3)