Analog Devices ADuCM320 Hardware Reference Manual page 177

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ADuCM320 Hardware Reference Manual
PAIR 0 TIMER
PWM0COM0
PWM0COM1
PWM0COM2
PAIR 0 OUTPUTS
HIGH SIDE
NOTES
1. NOTE THAT THE HIGH-SIDE PWM OUTPUT FOR EACH CHANNEL MUST HAVE A HIGH DURATION PERIOD GREATER THAN
OR EQUAL TO THE HIGH PERIOD DURATION OF THE LOW-SIDE OUTPUT. FOR EXAMPLE, THE HIGH PERIOD FOR PWM0
MUST BE GREATER THAN OR EQUAL TO THE HIGH PERIOD OF PWM1.
Table 265 lists equations for the period and duration for both the outputs of a PWM channel.
Table 265. PWM Equations
PWM
Period
Low Side (PWM1)
t
UCLK/DIV
High Side (PWM0)
t
UCLK/DIV
Note that:
t
is the PWM clock frequency selected by CLKCON1[2:0].
UCLK/DIV
N
is the prescaler value as determined by PWMCON0[8:6].
PRESCALE
0xFFFF
PWM0LEN
0x0000
PWM0
PWM1
LOW SIDE
Figure 32. Waveform of PWM Channel Pair in Standard Mode
× (PWM0LEN + 1) × N
PRESCALE
× (PWM0LEN + 1) × N
PRESCALE
PWM0COM2
PWM0COM1
Duration
High duration
If PWMCOM2 < PWMCOM1: t
Otherwise: t
× (PWM0LEN − PWM0COM1) × N
UCLK
Low duration
t
× (PWM0COM0 − PWM0COM1) × N
UCLK/DIV
Rev. C | Page 177 of 196
PWM0COM0
PWM0LEN
× (PWM0LEN − PWM0COM2) × N
UCLK/DIV
PRESCALE
PRESCALE
UG-498
PRESCALE

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