Watchdog Timer; Watchdog Timer Features; Watchdog Timer Block Diagram; Watchdog Timer Overview - Analog Devices ADuCM320 Hardware Reference Manual

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WATCHDOG TIMER

WATCHDOG TIMER FEATURES

16-bit count-down timer, which can be used to recover from an invalid software state.
Clocked by the 32 kHz internal oscillator (LFOSC) with a programmable prescaler (1, 16, 256, or 4096).

WATCHDOG TIMER BLOCK DIAGRAM

LFOSC

WATCHDOG TIMER OVERVIEW

The watchdog timer (Timer 3) is used to recover from an invalid software state. When enabled, this timer requires periodic servicing to
prevent it from forcing a reset of the device. For debug purposes, the timer can be configured to generate an interrupt instead of a reset.
The watchdog timer is clocked by the internal 32.768 kHz oscillator, LFOSC. It is clocked at all times except during a reset.
The watchdog timer is a 16-bit count-down timer with a programmable prescaler. The prescaler is selectable and can divide LFOSC by a
factor of 1, 16, 256, or 4096.

WATCHDOG TIMER OPERATION

The watchdog timer is enabled by default after a reset.
User code should disable the watchdog timer at the start of user code when debugging or if the watchdog timer is not required.
T3CON = 0x00;
Enabling the watchdog timer (set T3CON[5] = 1) also write protects T3CON and T3LD.
This means that after kernel execution, user code can disable the timer and then reconfigure it with T3CON[5] = 1 only once. Then
T3CON and T3LD are write protected. T3STA[4] indicates if the timer configuration has been locked. Only a reset clears T3CON[5],
unlocking T3CON and T3LD, and allows reconfiguration of the timer.
If T3CON is not modified, user code can change T3LD at any time. If T3CON[5] is cleared to 0, the timer is disabled. Settings can be
modified, and the timer can be reenabled.
When the watchdog timer is used in interrupt mode, T3STA[0], the WDT interrupt bit, is set to 1 for only a very short period (2 × PCLK).
Therefore, T3STA[0] should not be used for polling purposes.
16-BIT LOAD
PRESCALER
16 BIT UP/DOWN COUNTER 16-BIT DOWN COUNTER
1, 16, 256,
OR 4096
TIMER 3 VALUE
Figure 29. Watchdog Timer Block Diagram
// Disable watchdog timer
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ADuCM320 Hardware Reference Manual
WATCHDOG TIMER RESET
WATCHDOG TIMER INTERRUPT