Register Summary: Mdio Interface (Mdio); Register Details: Mdio - Analog Devices ADuCM320 Hardware Reference Manual

ADuCM320 Hardware Reference Manual

REGISTER SUMMARY: MDIO INTERFACE (MDIO)

Names and short descriptions of bits refer to the active state represented by a high (1) level unless explicitly enumerated.
Table 292. MDIO Register Summary
Address Name
0x40005C00 MDCON
0x40005C04 MDFRM
0x40005C08 MDRXD
0x40005C0C MDADR
0x40005C10 MDTXD
0x40005C14 MDPHY
0x40005C18 MDSTA
0x40005C1C MDIEN
0x40005C20 MDPIN

REGISTER DETAILS: MDIO

MDIO Block Control Register
Address: 0x40005C00, Reset: 0x0000, Name: MDCON
Control for MDIO block.
Table 293. Bit Descriptions for MDCON
Bits Bit Name
[15:3] RESERVED
2 MD_DRV
1 MD_PHY
0 MD_RST
MDIO Received Frame Control Information Register
Address: 0x40005C04, Reset: 0x0000, Name: MDFRM
Contains control information of last frame received.
Table 294. Bit Descriptions for MDFRM
Bits Bit Name
[15:12] RESERVED
[11:7] MD_DEV
[6:2] MD_PHY
[1:0] MD_OP
MDIO Received Data Register
Address: 0x40005C08, Reset: 0x000X, Name: MDRXD
Data received from last write frame.
Table 295. Bit Descriptions for MDRXD
Bits Bit Name
[15:0] MD_RXD
Description
MDIO block control
MDIO received frame control information
MDIO received data
MDIO received address
MDIO data for transmission
MDIO PHYADDR software values and selection and DEVADD
MDIO progress signaling through frame
MDIO interrupt enables
MDIO read PHYADDR pins
Description
Reserved.
0: MDIO drive open-drain.
1: MDIO drive push-pull.
0: MDIO PHY uses 5 bits.
1: MDIO PHY uses 3 bits. Unused PHY bits are ignored.
Write 1 to reset MDIO block. Hardware immediately clears MD_RST again.
Description
Reserved
Received DEVADD
Received PHYADR
Received OP
00: address frame
01: write frame
10: post read increment address frame
11: read frame
Description
Received data
Rev. C | Page 191 of 196
UG-498
Reset Access
0x0000 RW
0x0000 R
0x000X R
0x000X R
0x0000 RW
0x0400 RW
0x0000 RW
0x0000 RW
0x0000 RW
Reset Access
0x0 R
0x0 RW
0x0 RW
0x0 W
Reset Access
0x0 R
0x0 R
0x0 R
0x0 R
Reset Access
0xx R