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ADuCM320 Hardware Reference Manual
REGISTER DETAILS: ADC CIRCUIT
ADC Configuration Register
Address: 0x40082174, Reset: 0x0280, Name: ADCCON
Table 13. Bit Descriptions for ADCCON
Bits
Bit Name
[15:11]
RESERVED
10
SOFT_RESET
9
PUP
8
RESERVED
7
REFB_PUP
6
RESTART_ADC
5
RESERVED
4
SEQ_DMA
3
CNV_DMA
[2:0]
C_TYPE
Description
Reserved.
Software reset ADC.
ADC power up.
0: power down
1: power up
Reserved.
ADC reference buffer power up.
0: power down
1: power up
Must be set to 1 for the ADC to operate normally
Restart ADC, reset analog part of ADC. Active high.
0: normal ADC operation.
1: reset the ADC.
Reserved.
DMA request enable for ADC sequence conversion.
0: disable ADC sequencer DMA access
1: enable ADC sequencer DMA access
DMA request enable for ADC non-sequence conversion.
0: disable ADC DMA access
1: enable ADC DMA access
ADC conversion type.
00: no conversion
01: DIO pin starts conversion (P2.4)
10: single conversion
11: continuous conversion (use this mode for the sequencer)
100: PLA conversion
Rev. C | Page 29 of 196
UG-498
Reset
Access
0x0
R
0x0
W
0x1
RW
0x0
R
0x1
RW
0x0
W
0x0
R
0x0
RW
0x0
RW
0x0
RW
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