Analog Devices ADuCM320 Hardware Reference Manual page 47

ADuCM320 Hardware Reference Manual
Bits Bit Name
4 EN
[3:2] RESERVED
[1:0] RN
DAC7 Control Register
Address: 0x4008241C, Reset: 0x0100, Name: DAC7CON
Table 44. Bit Descriptions for DAC7CON
Bits Bit Name
[15:9] RESERVED
8 PD
[7:5] RESERVED
4 EN
[3:2] RESERVED
[1:0] RN
DAC0 Data Register
Address: 0x40086404, Reset: 0x00000000, Name: DAC0DAT
Table 45. Bit Descriptions for DAC0DAT
Bits Bit Name
[31:28] RESERVED
[27:16] DAT
[15:0] RESERVED
DAC1 Data Register
Address: 0x40086408, Reset: 0x00000000, Name: DAC1DAT
Table 46. Bit Descriptions for DAC1DAT
Bits Bit Name
[31:28] RESERVED
[27:16] DAT
[15:0] RESERVED
Description
DAC6 enable. Must be set to high.
0: DAC disable. Clear DAC data immediately
1: DAC enable.
Reserved.
DAC6 reference selection. These bits set the DAC range. A write to these
bits has immediate effect on the DAC.
00: internal reference
01: reserved
10: reserved
11: AVDD/AGND
Description
Reserved.
DAC7 power down.
0: DAC7 is powered up
1: DAC7 is powered down and output is floating
Reserved.
DAC7 enable. Must be set to high.
0: DAC disable. Clear DAC data immediately
1: DAC enable.
Reserved.
DAC7 reference selection. These bits set the DAC range. A write to these
bits has immediate effect on the DAC.
00: internal reference
01: reserved
10: reserved
11: AVDD/ AGND
Description
Reserved. Write 0.
DAC0 data.
Reserved. Write 0.
Description
Reserved. Write 0.
DAC1 data.
Reserved. Write 0.
Rev. C | Page 47 of 196
UG-498
Reset Access
0x0 RW
0x0 RW
0x0 RW
Reset Access
0x0 R
0x1 RW
0x0 RW
0x0 RW
0x0 RW
0x0 RW
Reset Access
0x0 R
0x0 RW
0x0 R
Reset Access
0x0 R
0x0 RW
0x0 R