Block Switching - Analog Devices ADuCM320 Hardware Reference Manual

UG-498
MDIO Interrupt Power-Up Register Write Sequence
To avoid false MDIO interrupts on startup, the order of register writes is important. The following is a code example showing how to
correctly configure the MDIO interrupt on startup.
pADI_MDIO->MDCON = 0x0006;
pADI_MDIO->MDPHY = 0x0700;
sta = pADI_MDIO->MDSTA;
pADI_MDIO->MDIEN = 0x000F;
NVIC_ClearPendingIRQ(MDIO_IRQn);

BLOCK SWITCHING

For MDIO applications, the system memory is separated into two flash blocks, as shown in Figure 37.
0x3FFFF
FLASH 1
0x20000
0x1FFFF
FLASH 0
0x0
1
SEE THE FLASH CONTROLLER SECTION FOR MORE INFORMATION ABOUT RESERVED LOCATIONS.
//read the MDSTA register to clear any interrupts
//clear any pending interrupts in the Cortex
FLASH BLOCK 0 ACTIVE
(FEECON1[3] = 0)
0x3FFFF
1
RESERVED
0x3FFE8
ACTIVE
NVR DATA
8kB
(IMAGE A)
0x3E000
NOT USED
KEY2' (K2B1) 0x3DFE8
NOT USED
KEY1' (K1B1) 0x3DFE0
INACTIVE
PROGRAM
120kB
(IMAGE B)
0x20000
0x1FFFF
1
RESERVED
0x1FFE8
INACTIVE
NVR DATA
8kB
(IMAGE B)
0x1E000
NOT USED
KEY2 (K2B0) 0x1DFE8
NOT USED
KEY1 (K1B0) 0x1DFE0
ACTIVE
PROGRAM
120kB
(IMAGE A)
0x0
Figure 37. Memory Maps for MDIO Block Switching
Rev. C | Page 186 of 196
ADuCM320 Hardware Reference Manual
FLASH BLOCK 1 ACTIVE
(FEECON1[3] = 1)
RESERVED
0x1FFFF INACTIVE
NVR DATA
8kB
(IMAGE A)
FLASH 1
NOT USED
KEY2 (K2B1)
NOT USED
0x0
KEY1 (K1B1)
ACTIVE
PROGRAM
120kB
(IMAGE B)
RESERVED
ACTIVE
0x3FFFF
NVR DATA
8kB
(IMAGE B)
FLASH 0
NOT USED
KEY2' (K2B0)
NOT USED
0x20000
KEY1' (K1B0)
ACTIVE
PROGRAM
120kB
(IMAGE B)
0x1FFFF
1
0x1FFE8
0x1E000
0x1DFE8
0x1DFE0
0x0
0x3FFFF
1
0x3FFE8
0x3E000
0x3DFE8
0x3DFE0
0x20000